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C8051F50X Datasheet(PDF) 97 Page - Silicon Laboratories |
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C8051F50X Datasheet(HTML) 97 Page - Silicon Laboratories |
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97 / 312 page  Rev. 1.1 97 C8051F50x-F51x 12. Memory Organization The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are two separate memory spaces: program memory and data memory. Program and data memory share the same address space but are accessed via different instruction types. The memory organization is shown in Figure 12.1 Figure 12.1. C8051F50x-F51x Memory Map PROGRAM/DATA MEMORY (FLASH) (Direct and Indirect Addressing) 0x00 0x7F Upper 128 RAM (Indirect Addressing Only) 0x80 0xFF Special Function Register's (Direct Addressing Only) DATA MEMORY (RAM) General Purpose Registers 0x1F 0x20 0x2F Bit Addressable Lower 128 RAM (Direct and Indirect Addressing) 0x30 INTERNAL DATA ADDRESS SPACE EXTERNAL DATA ADDRESS SPACE 0x0000 0x0FFF Same 4096 bytes as from 0x0000 to 0x0FFF, wrapped on 4096-byte boundaries 0x1000 0xFFFF 64 kB FLASH (In-System Programmable in 512 Byte Sectors) 0x0000 RESERVED 0xFC00 0xFBFF C8051F500/1/2/3/8/9 32 kB FLASH (In-System Programmable in 512 Byte Sectors) 0x0000 0x7FFF C8051F504/5/6/7-F510/1 XRAM 4K Bytes (accessable using MOVX instruction) |
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