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C8051F50X Datasheet(PDF) 42 Page - Silicon Laboratories |
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C8051F50X Datasheet(HTML) 42 Page - Silicon Laboratories |
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42 / 312 page  C8051F50x-F51x 42 Rev. 1.1 IDD 4 VDD = 2.6 V, F = 200 kHz — 130 — µA VDD = 2.6 V, F = 1.5 MHz — 990 — µA VDD = 2.6 V, F = 25 MHz — 14 21 mA VDD = 2.6 V, F = 50 MHz — 25 33 mA IDD Supply Sensitivity 4 F = 25 MHz — 68 — %/V F = 1 MHz — 73 — %/V IDD Frequency Sensitivity 4,5 VDD = 2.1V, F < 12.5 MHz, T = 25 °C — 0.46 — mA/MHz VDD = 2.1V, F > 12.5 MHz, T = 25 °C — 0.36 — mA/MHz VDD = 2.6V, F < 12.5 MHz, T = 25 °C — 0.64 — mA/MHz VDD = 2.6V, F > 12.5 MHz, T = 25 °C — 0.47 — mA/MHz Table 5.2. Global Electrical Characteristics (Continued) –40 to +125 °C, 24 MHz system clock unless otherwise specified. Parameter Conditions Min Typ Max Units Notes: 1. Given in Table 5.4 on page 46. 2. VIO should not be lower than the VDD voltage. 3. SYSCLK must be at least 32 kHz to enable debugging. 4. Based on device characterization data; Not production tested. Does not include oscillator supply current. 5. IDD can be estimated for frequencies < 12.5 MHz by simply multiplying the frequency of interest by the frequency sensitivity number for that range. When using these numbers to estimate IDD for >12.5 MHz, the estimate should be the current at 50 MHz minus the difference in current indicated by the frequency sensitivity number. For example: VDD = 2.6 V; F = 20 MHz, IDD = 26 mA - (50 MHz - 20 MHz) * 0.48 mA/MHz = 11.6 mA. 6. Idle IDD can be estimated for frequencies < 1 MHz by simply multiplying the frequency of interest by the frequency sensitivity number for that range. When using these numbers to estimate Idle IDD for >1 MHz, the estimate should be the current at 50 MHz minus the difference in current indicated by the frequency sensitivity number. For example: VDD = 2.6 V; F = 5 MHz, Idle IDD = 21 mA – (50 MHz – 5 MHz) x 0.41 mA/MHz = 2.6 mA. |
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