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TLE42994GMV33 Datasheet(PDF) 6 Page - Infineon Technologies AG |
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TLE42994GMV33 Datasheet(HTML) 6 Page - Infineon Technologies AG |
6 / 25 page Data Sheet 6 Rev. 1.01, 2010-10-14 TLE42994V33 Pin Configuration 3.3 Pin Assignment TLE42994EV33 (PG-SSOP-14 Exposed Pad) Figure 3 Pin Configuration (top view) 3.4 Pin Definitions and Functions TLE42994EV33 (PG-SSOP-14 Exposed Pad) Pin Symbol Function 1 RADJ Reset Threshold Adjust connect an external voltage divider to adjust reset threshold; connect to GND for using internal threshold 2, 6 n.c. not connected leave open or connect to GND 3D Reset Delay Timing connect a ceramic capacitor to GND for adjusting the reset delay time; leave open if the reset function is not needed 4 GND Ground connect all pins to PCB and heatsink area 5EN Enable high signal enables the regulator; low signal disables the regulator; connect to I if the Enable function is not needed 7RO Reset Output open collector output; internally linked to the output via a 20k Ω pull-up resistor; leave open if the reset function is not needed 8SO Sense Output open collector output; internally linked to the output via a 20k Ω pull-up resistor; leave open if the sense comparator is not needed 9, 10, 12 n.c. not connected leave open or connect to GND 11 Q Output block to GND with a capacitor close to the IC terminals, respecting the values given for its capacitance CQ and ESR in the table “Functional Range” on Page 8 13 I Input for compensating line influences, a capacitor to GND close to the IC terminals is recommended 14 SI Sense Input connect the voltage to be monitored; connect to Q if the sense comparator is not needed PAD – Exposed Pad attach the exposed pad on package bottom to the heatsink area on circuit board; connect to GND SI SO n.c. n.c. Q n.c. I RADJ RO n.c. EN GND D n.c. 1 2 3 4 5 6 7 14 9 10 11 12 13 8 PINCONFIG_SSOP-14.VSD |
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