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AT42QT1111-MU Datasheet(PDF) 3 Page - ATMEL Corporation |
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AT42QT1111-MU Datasheet(HTML) 3 Page - ATMEL Corporation |
3 / 50 page 3 9571A–AT42–02/10 AT42QT1111-MU/AT42QT1111-AU 1.2 Pin Descriptions I Input only I/O Input and output O Output only, push-pull OD Open drain output P Ground or power Table 1-1. Pin Listing Pin Name Type Comments If Unused, Connect To... 1 SNS0K I/O Sense Pin Leave open 2 SNS1 I/O Sense Pin Leave open 3 SNS1K I/O Sense Pin Leave open 4 Vdd P Power – 5 Vss P Supply Ground – 6 SNS2K I/O Sense Pin Leave open 7 SNS2 I/O Sense Pin Leave open 8 SNS3 I/O Sense Pin Leave open 9 SNS3K I/O Sense Pin Leave open 10 SNS4 I/O Sense Pin Leave open 11 SNS4K I/O Sense Pin Leave open 12 SNS5 I/O Sense Pin Leave open 13 SNS5K I/O Sense Pin Leave open 14 SS I Enable SPI Vss via 100 k resistor to enable SPI Vdd via 100 k resistor to disable SPI 15 MOSI I SPI Data In Leave open 16 MISO O SPI Data Out Leave open 17 SCK I SPI Clock Leave open 18 Vdd P Power – 19 SNS6K I/O Sense Pin Leave open 20 SNS6 I/O Sense Pin Leave open 21 Vss P Supply Ground – 22 SNS7K/DETECT0 I/O Sense Pin/Key Status Indicator Leave open 23 SNS7/DETECT1 I/O Sense Pin/Key Status Indicator Leave open 24 SNS8/DETECT2 I/O Sense Pin / Key Status Indicator Leave open 25 SNS8K/DETECT3 I/O Sense Pin / Key Status Indicator Leave open 26 SNS9/DETECT4 I/O Sense Pin / Key Status Indicator Leave open 27 SNS9K/DETECT5 I/O Sense Pin / Key Status Indicator Leave open 28 CHANGE OD Touch Event Indicator Leave open 29 RESET I Reset Vdd 30 SNS10/DETECT6 I/O Sense Pin / Key Status Indicator Leave open 31 SNS10K/SYNC I/O Sense Pin / Synchronization Input Vdd or Vss via 100 k resistor 32 SNS0 I/O Sense Pin Leave open |
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