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AT42QT1111-MU Datasheet(PDF) 31 Page - ATMEL Corporation |
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AT42QT1111-MU Datasheet(HTML) 31 Page - ATMEL Corporation |
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31 / 50 page  31 9571A–AT42–02/10 AT42QT1111-MU/AT42QT1111-AU Where data is being sent by the host, a 1-byte CRC should be sent. The QT1111 returns the expected CRC byte in the same transaction the CRC byte is sent. In this way, the host can immediately determine whether the setup data bytes were received correctly. Default GUARD_KEY value: 0 (Key 0) Default GD_EN value: 0 (disabled) Default CHG value: 0 (data mode) Default CRC value: 0 (disabled) 7.6 Address 2: Detect Integrator Limit (DIL)/Drift Hold Time (DHT) DIL: the detection integrator (DI) limit. To suppress false detections caused by spurious events like electrical noise, the device incorporates a DI counter mechanism. A per-key counter is incremented each time the channel has exceeded its threshold and stayed there for a number of acquisitions in succession, without going below the threshold level. When this counter reaches a preset limit the channel is finally declared to be touched. If on any acquisition the delta is not seen to exceed the threshold level, the counter is cleared and the process has to start from the beginning. Note: A setting of 0 for DI is invalid; the valid range is 1 to 15. DHT: the drift hold time. After a key-touch has been removed, the QT1111 pauses in the implementation of its “Drift” compensation for a time. After this time has expired, drift compensation continues as normal. The “Drift Hold Time” is a multiple of 160 ms, providing options from 0 to 2400 ms. Default DIL value: 3 Default DHT value: 8 (1280 ms) 7.7 Address 3: Positive Threshold (PTHR)/Positive Hysteresis (PHYST) PTHR: the positive threshold for the signal. If a key signal is significantly higher than the reference signal, this typically indicates that the calibration data is no longer valid. In other words, some factor has changed since the calibration was carried out, thus rendering it invalid. Generally this is compensated for by the drift, but the greater the difference the longer this will take. In order to speed up this correction, the positive threshold is used: if the positive threshold is exceeded, the QT1111 (that is, all keys) is recalibrated. Table 7-5. Detect Integrator/Drift Hold Time Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 2DIL DHT Table 7-6. Positive Threshold (THR)/Positive Hystereis (HYST) Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 3 PTHR PHYST |
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