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AK4160 Datasheet(PDF) 15 Page - Asahi Kasei Microsystems |
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AK4160 Datasheet(HTML) 15 Page - Asahi Kasei Microsystems |
15 / 40 page ![]() [AK4160] MS1313-E-01 2011/11 - 15 - SDA S T A R T S Slave Address Data (n) P S T O P R/W= “0” Sub Address(n) Data (n+1) Data (n+x) Figure 10. Data Transfer Sequence at the I2C-bus Mode 1 0 1 0 0 AD1 AD0 R/W (AD0 and AD1 should match with AD0 and AD1 pin.) Figure 11. The First Byte A7 A6 A5 A4 A3 A2 A1 A0 Figure 12. The Second Byte D7 D6 D5 D4 D3 D2 D1 D0 Figure 13. Byte Structure after the second byte SCL SDA stop condition start condition S P Figure 14. START and STOP Conditions SCL FROM MASTER acknowledge DATA OUTPUT BY TRANSMITTER DATA OUTPUT BY RECEIVER 1 9 8 START CONDITION not acknowledge clock pulse for acknowledgement S 2 Figure 15. Acknowledge on the I2C-Bus |
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Similar Description - AK4160 |
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