ADIS16488 datasheet(5/36 Pages) AD

Part #	ADIS16488

Description	Ten Degrees of Freedom Inertial Sensor

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Data Sheet

ADIS16488

Rev. B | Page 5 of 36

TIMING SPECIFICATIONS

TA = 25°C, VDD = 3.3 V, unless otherwise noted.

Table 2.

Normal Mode

Parameter

Description

Min1

Typ

Max1

Unit

fSCLK

Serial clock

0.01

15

MHz

tSTALL

Stall period between data

2

µs

tCLS

Serial clock low period

31

ns

tCHS

Serial clock high period

31

ns

t

CS

Chip select to clock edge

32

ns

tDAV

DOUT valid after SCLK edge

10

ns

tDSU

DIN setup time before SCLK rising edge

2

ns

tDHD

DIN hold time after SCLK rising edge

2

ns

tDR, tDF

DOUT rise/fall times, ≤100 pF loading

3

8

ns

tDSOE

CS assertion to data out active

0

11

ns

tHD

SCLK edge to data out invalid

0

ns

tDSHI

CS deassertion to data out high impedance

0

9

ns

t1

Input sync pulse width

5

µs

t2

Input sync to data-ready output

490

µs

t3

Input sync period

417

µs

1

Guaranteed by design and characterization, but not tested in production.

Timing Diagrams

CS

SCLK

DOUT

DIN

1

2

3

4

5

6

15

16

R/W

A5

A6

A4

A3

A2

D2

MSB

DB14

D1

LSB

DB13

DB12

DB10

DB11

DB2

LSB

DB1

tCS

tDSHI

tDAV

tHD

tCHS

tCLS

tDSOE

tDHD

tDSU

Figure 2. SPI Timing and Sequence

CS

SCLK

tSTALL

Figure 3. Stall Time and Data Rate

t3

t2

t1

SYNC

CLOCK (CLKIN)

DATA

READY

OUTPUT

REGISTERS

DATA VALID

Figure 4. Input Clock Timing Diagram

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