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ADIS16488 Datasheet(PDF) 30 Page - Analog Devices

Part # ADIS16488
Description  Ten Degrees of Freedom Inertial Sensor
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADIS16488 Datasheet(HTML) 30 Page - Analog Devices

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ADIS16488
Data Sheet
Rev. B | Page 30 of 36
Table 117. FNCTIO_CTRL (Page 3, Base Address = 0x06)
Bits
Description (Default = 0x000D)
[15:12]
Not used
11
Alarm indicator: 1 = enabled, 0 = disabled
10
Alarm indicator polarity: 1 = positive, 0 = negative
[9:8]
Alarm indicator line selection:
00 = DIO1, 01 = DIO2, 10 = DIO3, 11 = DIO4
7
Sync clock input enable: 1 = enabled, 0 = disabled
6
Sync clock input polarity:
1 = rising edge, 0 = falling edge
[5:4]
Sync clock input line selection:
00 = DIO1, 01 = DIO2, 10 = DIO3, 11 = DIO4
3
Data-ready enable: 1 = enabled, 0 = disabled
2
Data-ready polarity: 1 = positive, 0 = negative
[1:0]
Data-ready line selection:
00 = DIO1, 01 = DIO2, 10 = DIO3, 11 = DIO4
Data-Ready Indicator
FNCTIO_CTRL[3:0] provide some configuration options for
using one of the DIOx lines as a data-ready indicator signal,
which can drive a processor’s interrupt control line. The factory
default assigns DIO2 as a positive polarity, data-ready signal.
Use the following sequence to change this assignment to DIO1
with a negative polarity: turn to Page 3 (DIN = 0x8003) and set
FNCTIO_CTRL[3:0] = 1000 (DIN = 0x8608, then DIN = 0x8700).
The timing jitter on the data-ready signal is ±1.4 µs.
Input Sync/Clock Control
FNCTIO_CTRL[7:4] provide some configuration options for
using one of the DIOx lines as an input synchronization signal
for sampling inertial sensor data. For example, use the following
sequence to establish DIO4 as a positive polarity, input clock pin
and keep the factory default setting for the data-ready function:
turn to Page 3 (DIN = 0x8003) and set FNCTIO_CTRL[7:0]
= 0xFD (DIN = 0x86FD, then DIN = 0x8700). Note that this
command also disables the internal sampling clock, and no
data sampling takes place without the input clock signal.
When selecting a clock input frequency, consider the 330 Hz
sensor bandwidth, because under sampling the sensors can
degrade noise and stability performance.
General-Purpose I/O Control
When FNCTIO_CTRL does not configure a DIOx pin,
GPIO_CTRL provides register controls for general-purpose use
of the pin. GPIO_CTRL[3:0] provides input/output assignment
controls for each line. When the DIOx lines are inputs, monitor
their level by reading GPIO_CTRL[7:4]. When the DIOx lines
are used as outputs, set their level by writing to GPIO_CTRL[7:4].
For example, use the following sequence to set DIO1 and
DIO3 as high and low output lines, respectively, and set DIO2
and DIO4 as input lines. Turn to Page 3 (DIN = 0x8003) and set
GPIO_CTRL[7:0] = 0x15 (DIN = 0x8815, then DIN = 0x8900).
Table 118. GPIO_CTRL (Page 3, Base Address = 0x08)
Bits
Description (Default = 0x00X0)1
[15:8]
Don’t care
7
General-Purpose I/O Line 4 (DIO4) data level
6
General-Purpose I/O Line 3 (DIO3) data level
5
General-Purpose I/O Line 2 (DIO2) data level
4
General-Purpose I/O Line 1 (DIO1) data level
3
General-Purpose I/O Line 4 (DIO4) direction control
(1 = output, 0 = input)
2
General-Purpose I/O Line 3 (DIO3) direction control
(1 = output, 0 = input)
1
General-Purpose I/O Line 2 (DIO2) direction control
(1 = output, 0 = input)
0
General-Purpose I/O Line 1 (DIO1) direction control
(1 = output, 0 = input)
1
GPIO_CTRL[7:4] reflects levels on DIOx lines.
POWER MANAGEMENT
The SLP_CNT register (see Table 119) provides controls for
both power-down mode and sleep modes. The trade-off
between power-down mode and sleep mode is between idle
power and recovery time. Power-down mode offers the best
idle power consumption but requires the most time to recover.
Also, all volatile settings are lost during power-down but are
preserved during sleep mode.
For timed sleep mode, turn to Page 3 (DIN = 0x8003), write the
amount of sleep time to SLP_CNT[7:0] and then, set SLP_CNT[8]
= 1 (DIN = 0x9101) to start the sleep period. For a timed power-
down period, change the last command to set SLP_CNT[9] = 1
(DIN = 0x9102). To power down or sleep for an indefinite
period, set SLP_CNT[7:0] = 0x00 first, then set either
SLP_CNT[8] or SLP_CNT[9] to 1. Note that the command
takes effect when the CS line goes high. To awaken the device
from sleep or power-down mode, use one of the following
options to restore normal operation:
Assert CS from high to low.
Pulse RST low, then high again.
Cycle the power.
For example, set SLP_CNT[7:0] = 0x64 (DIN = 0x9064), then
set SLP_CNT[8] = 1 (DIN = 0x9101) to start a sleep period of
100 seconds.


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