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24LC08BISN Datasheet(PDF) 8 Page - Microchip Technology

Part # 24LC08BISN
Description  8K I2C??Serial EEPROM
Download  40 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

24LC08BISN Datasheet(HTML) 8 Page - Microchip Technology

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24AA08/24LC08B
DS21710K-page 8
 2002-2012 Microchip Technology Inc.
6.0
WRITE OPERATION
6.1
Byte Write
Following the Start condition from the master, the
device code (4 bits), the block address (3 bits) and the
R/W bit, which is a logic-low, is placed onto the bus by
the master transmitter. This indicates to the addressed
slave receiver that a byte with a word address will
follow once it has generated an Acknowledge bit during
the ninth clock cycle. Therefore, the next byte transmit-
ted by the master is the word address and will be
written into the Address Pointer of the 24XX08. After
receiving another Acknowledge signal from the
24XX08, the master device will transmit the data word
to be written into the addressed memory location. The
24XX08 acknowledges again and the master
generates a Stop condition. This initiates the internal
write cycle and, during this time, the 24XX08 will not
generate Acknowledge signals (Figure 6-1).
6.2
Page Write
The write control byte, word address and the first data
byte are transmitted to the 24XX08 in the same way as
in a byte write. However, instead of generating a Stop
condition, the master transmits up to 16 data bytes to
the 24XX08, which are temporarily stored in the on-
chip page buffer and will be written into memory once
the master has transmitted a Stop condition. Upon
receipt of each word, the four lower-order Address
Pointer bits are internally incremented by ‘
1’. The
higher-order 7 bits of the word address remain
constant. If the master should transmit more than 16
words prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the Stop condition is received an
internal write cycle will begin (Figure 6-2).
6.3
Write Protection
The WP pin allows the user to write-protect the entire
array (000-3FF) when the pin is tied to VCC. If the pin is
tied to VSS the write protection is disabled.
The Chip Select package does not support the write-
protect feature.
FIGURE 6-1:
BYTE WRITE
FIGURE 6-2:
PAGE WRITE
Note:
Page write operations are limited to writ-
ing bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size
(or ‘page-size’) and end at addresses that
are integer multiples of [page size – 1]. If
a Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page, as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
S
P
Bus Activity
Master
SDA Line
Bus Activity
S
T
A
R
T
S
T
O
P
Control
Byte
Word
Address
Data
A
C
K
A
C
K
A
C
K
x = “don’t care”
10 1 0X B1 B0 0
Block
Select
Bits
S
P
Bus Activity
Master
SDA Line
Bus Activity
S
T
A
R
T
Control
Byte
Word
Address (n)
Data (n)
Data (n + 15)
S
T
O
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
Data (n + 1)
x = “don’t care”
Block
Select
Bits
1
1
0
0X B1B00


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