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FDD6530A Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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FDD6530A Datasheet(HTML) 2 Page - Fairchild Semiconductor |
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2 / 5 page  FDD6530A Rev. C (W) ) ON ( DS D R P Electrical Characteristics T A = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Drain-Source Avalanche Ratings (Note 2) WDSS Drain-Source Avalanche Energy Single Pulse, VDD = 10 V 55 mJ IAR Drain-Source Avalanche Current 8 A Off Characteristics BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA 20 V ∆BVDSS ∆T J Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C 15 mV/ °C IDSS Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V 1 µA IGSSF Gate–Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA IGSSR Gate–Body Leakage, Reverse VGS = –8 V, VDS = 0 V –100 nA On Characteristics (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 0.4 0.9 1.2 V ∆VGS(th) ∆T J Gate Threshold Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C –3 mV/ °C RDS(on) Static Drain–Source On–Resistance VGS = 4.5 V, ID = 8 A VGS = 2.5 V, ID = 6.6 A VGS = 4.5 V, ID = 8 A, TJ = 125 °C 26 36 36 32 47 48 m Ω ID(on) On–State Drain Current VGS = 4.5 V, VDS = 5 V 20 A gFS Forward Transconductance VDS = 5 V, ID = 8 A 21 S Dynamic Characteristics Ciss Input Capacitance 710 pF Coss Output Capacitance 173 pF Crss Reverse Transfer Capacitance VDS = 10 V, V GS = 0 V, f = 1.0 MHz 84 pF Switching Characteristics (Note 2) td(on) Turn–On Delay Time 8 16 ns tr Turn–On Rise Time 7 14 ns td(off) Turn–Off Delay Time 18 32 ns tf Turn–Off Fall Time VDD = 10 V, ID = 1 A, VGS = 4.5 V, RGEN = 6 4 8 ns Qg Total Gate Charge 6.5 9 nC Qgs Gate–Source Charge 1.3 nC Qgd Gate–Drain Charge VDS = 10 V, ID = 8 A, VGS = 4.5 V 1.9 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current 2.7 A VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = 2.7 A (Note 2) 0.8 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) RθJA = 45°C/W when mounted on a 1in 2 pad of 2 oz copper Scale 1 : 1 on letter size paper b) RθJA = 96°C/W when mounted on a minimum pad. 2. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0% 3. Maximum current is calculated as: where PD is maximum power dissipation at TC = 25°C and RDS(on) is at TJ(max) and VGS = 10V. Package current limitation is 21A |
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Similar Description - FDD6530A |
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