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C8051F044-GQ Datasheet(PDF) 3 Page - Silicon Laboratories |
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C8051F044-GQ Datasheet(HTML) 3 Page - Silicon Laboratories |
3 / 328 page C8051F040/1/2/3/4/5/6/7 Rev. 1.5 3 Table of Contents 1. System Overview.................................................................................................... 19 1.1. CIP-51™ Microcontroller Core.......................................................................... 25 1.1.1. Fully 8051 Compatible.............................................................................. 25 1.1.2. Improved Throughput ............................................................................... 25 1.1.3. Additional Features .................................................................................. 26 1.2. On-Chip Memory............................................................................................... 27 1.3. JTAG Debug and Boundary Scan..................................................................... 28 1.4. Programmable Digital I/O and Crossbar ........................................................... 29 1.5. Programmable Counter Array ........................................................................... 30 1.6. Controller Area Network.................................................................................... 31 1.7. Serial Ports ....................................................................................................... 31 1.8. 12/10-Bit Analog to Digital Converter................................................................ 32 1.9. 8-Bit Analog to Digital Converter (C8051F040/1/2/3 Only) ............................... 33 1.10.Comparators and DACs ................................................................................... 34 2. Absolute Maximum Ratings .................................................................................. 35 3. Global DC Electrical Characteristic ...................................................................... 36 4. Pinout and Package Definitions............................................................................ 37 5. 12-Bit ADC (ADC0, C8051F040/1 Only)................................................................. 47 5.1. Analog Multiplexer and PGA............................................................................. 47 5.1.1. Analog Input Configuration....................................................................... 48 5.2. High-Voltage Difference Amplifier..................................................................... 52 5.3. ADC Modes of Operation.................................................................................. 54 5.3.1. Starting a Conversion............................................................................... 54 5.3.2. Tracking Modes........................................................................................ 54 5.3.3. Settling Time Requirements ..................................................................... 56 5.4. ADC0 Programmable Window Detector ........................................................... 62 6. 10-Bit ADC (ADC0, C8051F042/3/4/5/6/7 Only)..................................................... 69 6.1. Analog Multiplexer and PGA............................................................................. 69 6.1.1. Analog Input Configuration....................................................................... 70 6.2. High-Voltage Difference Amplifier..................................................................... 74 6.3. ADC Modes of Operation.................................................................................. 76 6.3.1. Starting a Conversion............................................................................... 76 6.3.2. Tracking Modes........................................................................................ 76 6.3.3. Settling Time Requirements ..................................................................... 78 6.4. ADC0 Programmable Window Detector ........................................................... 84 7. 8-Bit ADC (ADC2, C8051F040/1/2/3 Only)............................................................. 91 7.1. Analog Multiplexer and PGA............................................................................. 91 7.2. ADC2 Modes of Operation................................................................................ 92 7.2.1. Starting a Conversion............................................................................... 92 7.2.2. Tracking Modes........................................................................................ 92 7.2.3. Settling Time Requirements ..................................................................... 94 7.3. ADC2 Programmable Window Detector ......................................................... 100 7.3.1. Window Detector in Single-Ended Mode................................................ 100 |
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