DSPIC33FJ12MC201TESS datasheet(193/304 Pages) MICROCHIP

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DS70265E-page 193

dsPIC33FJ12MC201/202

20.0

10-BIT/12-BIT ANALOG-TO-

DIGITAL CONVERTER (ADC)

The dsPIC33FJ12MC201/202 devices have up to six

ADC module input channels.

The AD12B bit (ADxCON1<10>) allows each of the

ADC modules to be configured as either a 10-bit, 4-

sample-and-hold ADC (default configuration), or a

12-bit, 1 sample-and-hold ADC.

20.1

Key Features

The 10-bit ADC configuration has the following key

features:

• Successive Approximation (SAR) conversion

• Conversion speeds of up to 1.1 Msps

• Up to six analog input pins

• External voltage reference input pins

• Simultaneous sampling of up to four analog input

pins

• Automatic Channel Scan mode

• Selectable conversion trigger source

• Selectable Buffer Fill modes

• Four result alignment options (signed/unsigned,

fractional/integer)

• Operation during CPU Sleep and Idle modes

• 16-word conversion result buffer

The 12-bit ADC configuration supports all the above

features, except:

• In the 12-bit configuration, conversion speeds of

up to 500 ksps are supported

• There is only one sample-and-hold amplifier in the

12-bit configuration, so simultaneous sampling of

multiple channels is not supported.

Depending on the particular device pinout, the ADC

can have up to six analog input pins, designated AN0

through AN5. In addition, there are two analog input

pins for external voltage reference connections. These

voltage reference inputs can be shared with other

analog input pins.

The actual number of analog input pins and external

voltage reference input configuration will depend on the

specific device.

Block diagrams of the ADC module are shown in

Figure 20-1 and Figure 20-2.

20.2

ADC Initialization

To configure the ADC module:

Select

port

pins

analog

inputs

(ADxPCFGH<15:0> or ADxPCFGL<15:0>).

Select voltage reference source to match

expected

range

analog

inputs

(ADxCON2<15:13>).

Select the analog conversion clock to match the

desired data rate with the processor clock

(ADxCON3<7:0>).

Determine how many sample-and-hold chan-

nels will be used (ADxCON2<9:8> and

ADxPCFGH<15:0> or ADxPCFGL<15:0>).

Select

the

appropriate

sample/conversion

sequence

(ADxCON1<7:5>

and

ADxCON3<12:8>).

Select the way conversion results are presented

in the buffer (ADxCON1<9:8>).

Turn on the ADC module (ADxCON1<15>).

Configure ADC interrupt (if required):

a) Clear the ADxIF bit.

b) Select the ADC interrupt priority.

Note 1:

This data sheet summarizes the features

of the dsPIC33FJ12MC201/202 family of

devices. It is not intended to be a

comprehensive reference source. To

complement the information in this data

sheet, refer to Section 16. “Analog-to-

Digital Converter (ADC)”

(DS70183) of

the “dsPIC33F/PIC24H Family Refer-

ence Manual”

, which is available on the

Microchip website (www.microchip.com).

Some registers and associated bits

described in this section may not be

available on all devices. Refer to

Section 4.0 “Memory Organization”

this data sheet for device-specific register

and bit information.

Note:

The ADC module must be disabled before

the AD12B bit can be modified.

DSPIC33FJ12MC201TESS Datasheet(PDF) 193 Page - Microchip Technology

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