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PIC18F2525 Datasheet(PDF) 22 Page - Microchip Technology |
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PIC18F2525 Datasheet(HTML) 22 Page - Microchip Technology |
22 / 412 page PIC18F2525/2620/4525/4620 DS39626E-page 20 © 2008 Microchip Technology Inc. PORTD is a bidirectional I/O port or a Parallel Slave Port (PSP) for interfacing to a microprocessor port. These pins have TTL input buffers when the PSP module is enabled. RD0/PSP0 RD0 PSP0 19 38 38 I/O I/O ST TTL Digital I/O. Parallel Slave Port data. RD1/PSP1 RD1 PSP1 20 39 39 I/O I/O ST TTL Digital I/O. Parallel Slave Port data. RD2/PSP2 RD2 PSP2 21 40 40 I/O I/O ST TTL Digital I/O. Parallel Slave Port data. RD3/PSP3 RD3 PSP3 22 41 41 I/O I/O ST TTL Digital I/O. Parallel Slave Port data. RD4/PSP4 RD4 PSP4 27 2 2 I/O I/O ST TTL Digital I/O. Parallel Slave Port data. RD5/PSP5/P1B RD5 PSP5 P1B 28 3 3 I/O I/O O ST TTL — Digital I/O. Parallel Slave Port data. Enhanced CCP1 output. RD6/PSP6/P1C RD6 PSP6 P1C 29 4 4 I/O I/O O ST TTL — Digital I/O. Parallel Slave Port data. Enhanced CCP1 output. RD7/PSP7/P1D RD7 PSP7 P1D 30 5 5 I/O I/O O ST TTL — Digital I/O. Parallel Slave Port data. Enhanced CCP1 output. TABLE 1-3: PIC18F4525/4620 PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Name Pin Number Pin Type Buffer Type Description PDIP QFN TQFP Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output ST = Schmitt Trigger input with CMOS levels I = Input O = Output P = Power Note 1: Default assignment for CCP2 when the CCP2MX Configuration bit is set. 2: Alternate assignment for CCP2 when the CCP2MX Configuration bit is cleared. 3: For the QFN package, it is recommended that the bottom pad be connected to VSS. |
Similar Part No. - PIC18F2525_08 |
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Similar Description - PIC18F2525_08 |
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