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PIC18F2525 Datasheet(PDF) 53 Page - Microchip Technology |
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PIC18F2525 Datasheet(HTML) 53 Page - Microchip Technology |
53 / 412 page © 2008 Microchip Technology Inc. DS39626E-page 51 PIC18F2525/2620/4525/4620 ADRESH 2525 2620 4525 4620 xxxx xxxx uuuu uuuu uuuu uuuu ADRESL 2525 2620 4525 4620 xxxx xxxx uuuu uuuu uuuu uuuu ADCON0 2525 2620 4525 4620 --00 0000 --00 0000 --uu uuuu ADCON1 2525 2620 4525 4620 --00 0qqq --00 0qqq --uu uuuu ADCON2 2525 2620 4525 4620 0-00 0000 0-00 0000 u-uu uuuu CCPR1H 2525 2620 4525 4620 xxxx xxxx uuuu uuuu uuuu uuuu CCPR1L 2525 2620 4525 4620 xxxx xxxx uuuu uuuu uuuu uuuu CCP1CON 2525 2620 4525 4620 0000 0000 0000 0000 uuuu uuuu 2525 2620 4525 4620 --00 0000 --00 0000 --uu uuuu CCPR2H 2525 2620 4525 4620 xxxx xxxx uuuu uuuu uuuu uuuu CCPR2L 2525 2620 4525 4620 xxxx xxxx uuuu uuuu uuuu uuuu CCP2CON 2525 2620 4525 4620 --00 0000 --00 0000 --uu uuuu BAUDCON 2525 2620 4525 4620 0100 0-00 0100 0-00 uuuu u-uu PWM1CON 2525 2620 4525 4620 0000 0000 0000 0000 uuuu uuuu ECCP1AS 2525 2620 4525 4620 0000 0000 0000 0000 uuuu uuuu 2525 2620 4525 4620 0000 00-- 0000 00-- uuuu uu-- CVRCON 2525 2620 4525 4620 0000 0000 0000 0000 uuuu uuuu CMCON 2525 2620 4525 4620 0000 0111 0000 0111 uuuu uuuu TMR3H 2525 2620 4525 4620 xxxx xxxx uuuu uuuu uuuu uuuu TMR3L 2525 2620 4525 4620 xxxx xxxx uuuu uuuu uuuu uuuu T3CON 2525 2620 4525 4620 0000 0000 uuuu uuuu uuuu uuuu SPBRGH 2525 2620 4525 4620 0000 0000 0000 0000 uuuu uuuu SPBRG 2525 2620 4525 4620 0000 0000 0000 0000 uuuu uuuu RCREG 2525 2620 4525 4620 0000 0000 0000 0000 uuuu uuuu TXREG 2525 2620 4525 4620 0000 0000 0000 0000 uuuu uuuu TXSTA 2525 2620 4525 4620 0000 0010 0000 0010 uuuu uuuu RCSTA 2525 2620 4525 4620 0000 000x 0000 000x uuuu uuuu EEADRH 2585 2680 4585 4680 ---- --00 ---- --00 ---- --uu EEADR 2525 2620 4525 4620 0000 0000 0000 0000 uuuu uuuu EEDATA 2525 2620 4525 4620 0000 0000 0000 0000 uuuu uuuu EECON2 2525 2620 4525 4620 0000 0000 0000 0000 0000 0000 EECON1 2525 2620 4525 4620 xx-0 x000 uu-0 u000 uu-0 u000 TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Applicable Devices Power-on Reset, Brown-out Reset MCLR Resets, WDT Reset, RESET Instruction, Stack Resets Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition. Shaded cells indicate conditions do not apply for the designated device. Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (0008h or 0018h). 3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack. 4: See Table 4-3 for Reset value for specific condition. 5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as PORTA pins, they are disabled and read ‘0’. |
Similar Part No. - PIC18F2525_08 |
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Similar Description - PIC18F2525_08 |
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