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H5PS5182GFRS6C Datasheet(PDF) 25 Page - Hynix Semiconductor |
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H5PS5182GFRS6C Datasheet(HTML) 25 Page - Hynix Semiconductor |
25 / 64 page Rev.1.7 / Feb. 2013 25 H5PS5162GFR series Parameter Symbol DDR2-667 DDR2-800 Unit Note min max min max Four Active Window for 1KB page size products tFAW 37.5 -35 - ns 32 Four Active Window for 2KB page size products tFAW 50 -45 - ns 32 CAS to CAS command delay tCCD 2 2 tCK Write recovery time tWR 15 -15 - ns 32 Auto precharge write recovery + precharge time tDAL WR+tnRP - WR+tnRP - tCK 14 Internal write to read command delay tWTR 7.5 -7.5 - ns 24,32 Internal read to precharge command delay tRTP 7.5 7.5 ns 3,32 CKE minimum pulse width (high and low pulse width) tCKE 3 - 3 - tCK 27 Exit self refresh to a non-read command tXSNR tRFC + 10 - tRFC + 10 - ns 32 Exit self refresh to a read command tXSRD 200 - 200 - tCK Exit precharge power down to any non-read command tXP 2 - 2 - tCK Exit active power down to read command tXARD 2 2 tCK 1 Exit active power down to read command (Slow exit, Lower power) tXARDS 7 - AL 8 - AL tCK 1, 2 ODT turn-on delay tAOND 22 2 2 tCK 16 ODT turn-on tAON tAC,min tAC,max +0.7 tAC,min tAC,max +0.7 ns 6,16,40 ODT turn-on(Power-Down mode) tAONPD tAC,min+2 2tCK(avg) +tAC,max +1 tAC,min+2 2tCK(avg) +tAC,max +1 ns ODT turn-off delay tAOFD 2.5 2.5 2.5 2.5 tCK 17,45 ODT turn-off tAOF tAC(min) tAC(max)+ 0.6 tAC(min) tAC(max) +0.6 ns 17.43, 45 ODT turn-off (Power-Down mode) tAOFPD tAC,min +2 2.5tCK(avg )+tAC,max +1 tAC(min) +2 2.5tCK(avg )+tAC,max +1 ns ODT to power down entry latency tANPD 3 - 3 - tCK ODT power down exit latency tAXPD 8 8 tCK Mode register set command cycle time tMRD 2 - 2 - tCK MRS command to ODT update delay tMOD 0 12 0 12 ns 32 OCD drive mode output delay tOIT 0 12 0 12 ns 32 Minimum time clocks remains ON after CKE asynchronously drops LOW tDelay tIS+tCK(av g)+tIH tIS+tCK(a vg)+tIH ns 15 -Continue- |
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