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H5PS1G63JFRS6C Datasheet(PDF) 20 Page - Hynix Semiconductor |
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H5PS1G63JFRS6C Datasheet(HTML) 20 Page - Hynix Semiconductor |
20 / 62 page ![]() Rev. 1.7 / Nov. 2011 20 Release H5PS1G63JFR Series 4. Electrical Characteristics & AC Timing Specification (TOPER; VDDQ = 1.8 +/- 0.1V; VDD = 1.8 +/- 0.1V) Refresh Parameters by Device Density Note: 1: If refresh timing is violated, data corruption may occur and the data must be re-written with valid data before a valid READ can be executed. 2. This is an optional feature. For detailed information, please refer to “operating temperature condition” in this data sheet. DDR2 SDRAM speed bins and tRCD, tRP and tRC for corresponding bin Note: 1. 8 bank device Precharge All Allowance: tRP for a Precharge All command for an 8 Bank device will equal to tRP+1*tCK, where tRP are the values for a single bank Precharge, which are shown in the table above. 2. Refer to Specific Notes 32. 3. Refer to Specific Notes 3. Parameter Symbol 256Mb 512Mb 1Gb 2Gb 4Gb Units Notes Refresh to Active/Refresh command time tRFC 75 105 127.5 195 327.5 ns 1 Average periodic refresh interval tREFI -40 ℃≤ TCASE ≤ 85 ℃ 7.8 7.8 7.8 7.8 7.8 us 1 85℃< TCASE ≤ 95 ℃ 3.9 3.9 3.9 3.9 3.9 us 1,2 Speed DDR2-800 DDR2-667 DDR2-533 DDR2-400 Units Notes Parameter min min min min min min Bin(CL-tRCD-tRP) 5-5-5 6-6-6 4-4-4 5-5-5 4-4-4 3-3-3 CAS Latency 564 543 tCK tRCD 12.5 15 12 15 15 15 ns 2 tRP*1 12.5 15 12 15 15 15 ns 2 tRAS 45 45 45 45 45 40 ns 2,3 tRC 57.5 60 57 60 60 55 ns 2 |
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