H5PS1G63JFRS6C datasheet(24/62 Pages) HYNIX

Part #	H5PS1G63JFRS6C

Description	1Gb DDR2 SDRAM

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Manufacturer	HYNIX [Hynix Semiconductor]

Direct Link	http://www.skhynix.com/kor/main.do

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24 / 62 page

Rev. 1.7 / Nov. 2011

24

Release

H5PS1G63JFR Series

-Continued-

Parameter

Symbol

DDR2-667

DDR2-800

Unit

Notes

min

max

min

max

Internal write to read command delay

tWTR

7.5

-7.5

-

ns

24,32

Internal read to precharge command delay

tRTP

7.5

ns

3,32

Exit self refresh to a non-read command

tXSNR

tRFC + 10

ns

32

Exit self refresh to a read command

tXSRD

200

-

200

-

nCK

Exit precharge power down to any non-read

command

tXP

2

-

2

-

nCK

Exit active power down to read command

tXARD

2

nCK

1

Exit active power down to read command

(Slow exit, Lower power)

tXARDS

7 - AL

8 - AL

nCK

1, 2

CKE minimum pulse width

(HIGH and LOW pulse width)

tCKE

3

nCK

27

ODT turn-on delay

tAOND

2

nCK

16

ODT turn-on

tAON

tAC(min)

tAC(max)

+0.7

tAC(min)

tAC(max)

+0.7

ns

6,16,40

ODT turn-on(Power-Down mode)

tAONPD

tAC(min)+2

2tCK(avg)+

tAC(max)+1

tAC(min)

+2

2tCK(avg)+

tAC(max)+1

ns

ODT turn-off delay

tAOFD

2.5

nCK

17,45

ODT turn-off

tAOF

tAC(min)

tAC(max)+ 0.6

tAC(min)

tAC(max)

+0.6

ns

17,43,4

5

ODT turn-off (Power-Down mode)

tAOFPD

tAC(min)

+2

2.5tCK(avg)+

tAC(max)+1

tAC(min)

+2

2.5tCK(avg)+

tAC(max)+1

ns

ODT to power down entry latency

tANPD

3

nCK

ODT power down exit latency

tAXPD

8

nCK

OCD drive mode output delay

tOIT

0

12

0

12

ns

32

Minimum time clocks remains ON after CKE

asynchronously drops LOW

tDelay

tIS + tCK (avg)

+ tIH

tIS + tCK

(avg)

+ tIH

ns

15

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H5PS1G63JFRS6C Datasheet(PDF) 24 Page - Hynix Semiconductor

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