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H5PS1G63JFRS6C Datasheet(PDF) 40 Page - Hynix Semiconductor |
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H5PS1G63JFRS6C Datasheet(HTML) 40 Page - Hynix Semiconductor |
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40 / 62 page  Rev. 1.7 / Nov 2011 40 Release H5PS1G63JFR Series 36. These parameters are specified per their average values, however it is understood that the following relationship between the average timing and the absolute instantaneous timing holds at all times. (Min and max of SPEC values are to be used for calculations in the table below.) Example: For DDR2-667, tCH (abs), min = (0.48 x 3000 ps) - 125 ps = 1315 ps 37. tHP is the minimum of the absolute half period of the actual input clock. tHP is an input parameter but not an input specification parameter. It is used in conjunction with tQHS to derive the DRAM output timing tQH. The value to be used for tQH calculation is determined by the following equation; tHP = Min (tCH (abs), tCL (abs)), where, tCH (abs) is the minimum of the actual instantaneous clock HIGH time; tCL (abs) is the minimum of the actual instantaneous clock LOW time; 38. tQHS accounts for: 1) The pulse duration distortion of on-chip clock circuits, which represents how well the actual tHP at the input is transferred to the output; and 2) The worst case push-out of DQS on one transition followed by the worst case pull-in of DQ on the next transition, both of which are independent of each other, due to data pin skew, output pattern effects, and p-channel to n-channel variation of the output drivers 39. tQH = tHP ? tQHS, where: tHP is the minimum of the absolute half period of the actual input clock; and tQHS is the specification value under the max column. {The less half-pulse width distortion present, the larger the tQH value is; and the larger the valid data eye will be.} Examples: 1) If the system provides tHP of 1315 ps into a DDR2-667 SDRAM, the DRAM provides tQH of 975 ps min- imum. 2) If the system provides tHP of 1420 ps into a DDR2-667 SDRAM, the DRAM provides tQH of 1080 ps minimum. 40. When the device is operated with input clock jitter, this parameter needs to be derated by the actual tERR(6-10per) of the input clock. (output deratings are relative to the SDRAM input clock.) For example, if the measured jitter into a DDR2-667 SDRAM has tERR(6-10per),min = - 272 ps and Parameter Symbol min max Units Absolute clock period tCK (abs) tCK (avg), min + tJIT (per), min tCK (avg), max + tJIT (per), max ps Absolute clock HIGH pulse width tCH (abs) tCH (avg), min * tCK (avg), min + tJIT (per), min tCH (avg), max * tCK (avg), max + tJIT (per), max ps Absolute clock LOW pulse width tCL (abs) tCL (avg), min * tCK (avg), min + tJIT (per), min tCL (avg), max * tCK (avg), max + tJIT (per), max ps |
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