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EP1SGX40CF1020I6ES Datasheet(PDF) 9 Page - Altera Corporation |
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EP1SGX40CF1020I6ES Datasheet(HTML) 9 Page - Altera Corporation |
9 / 272 page Altera Corporation 1–7 February 2005 Stratix GX Device Handbook, Volume 1 Introduction to the Stratix GX Device Data Sheet Figure 1–2. Stratix GX Block Diagram The number of M512 RAM, M4K RAM, and DSP blocks varies by device along with row and column numbers and M-RAM blocks. Table 1–5 lists the resources available in Stratix GX devices. M512 RAM Blocks for Dual-Port Memory, Shift Registers, & FIFO Buffers DSP Blocks for Multiplication and Full Implementation of FIR Filters M4K RAM Blocks for True Dual-Port Memory & Other Embedded Memory Functions IOEs Support DDR, PCI, GTL+, SSTL-3, SSTL-2, HSTL, LVDS, LVPECL, PCML, HyperTransport & other I/O Standards IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs LABs LABs IOEs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs IOEs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs IOEs IOEs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs DSP Block M-RAM Block Table 1–5. Stratix GX Device Resources Device M512 RAM Columns/Blocks M4K RAM Columns/Blocks M-RAM Blocks DSP Block Columns/Blocks LAB Columns LAB Rows EP1SGX10 4 / 94 2 / 60 1 2 / 6 40 30 EP1SGX25 6 / 224 3 / 138 2 2 / 10 62 46 EP1SGX40 8 / 384 3 / 183 4 2 / 14 77 61 |
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