DOC7707 datasheet(209/307 Pages) ETC1

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209

7707F–AVR–11/10

AT90USB82/162

• Bit 2- RSTCPU - USB Reset CPU Bit

Set this bit to one by firmware in order to reset the CPU at the next USB reset (without disabling

the USB controller). The value of this bit will not be affected by the reset of the CPU generated

by a End Of Reset (remains set). This bit is reset when the USB controller is disabled.

Set this bit to zero by firmware otherwise.

• Bit 1- RMWKUP - Remote Wake-up Bit

Set to send an “upstream-resume” to the host for a remote wake-up. The SUSPI bit must be set

to allow the remote wake up to be sent.

Cleared by hardware. Clearing by software has no effect.

See Section 20.10, page 200 for more details.

• Bit 0 - DETACH - Detach Bit

Set to physically detach de device.

Clear to reconnect the device. See Section 20.9, page 199 for more details.

• 7 - Reserved

The value read from these bits is always 0. Do not set these bits.

• 6 - UPRSMI - Upstream Resume Interrupt Flag

Set by hardware when the USB controller is sending a resume signal called “Upstream

Resume”. This triggers an USB interrupt if UPRSME is set.

Shall be cleared by software (USB clocks must be enabled before). Setting by software has no

effect.

• 5 - EORSMI - End Of Resume Interrupt Flag

Set by hardware when the USB controller detects a good “End Of Resume” signal initiated by

the host. This triggers an USB interrupt if EORSME is set.

Shall be cleared by software. Setting by software has no effect.

• 4 - WAKEUPI - Wake-up CPU Interrupt Flag

Set by hardware when the USB controller is re-activated by a filtered non-idle signal from the

lines (not by an upstream resume). This triggers an interrupt if WAKEUPE is set.

Shall be cleared by software (USB clock inputs must be enabled before). Setting by software

has no effect.

See Section 20.8, page 199 for more details.

Bit

432

UPRSMI

EORSMI

WAKEUPI

EORSTI

SOFI

SUSPI

UDINT

Read/Wri

R/W

Initial

Value

000

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