DSPIC33FJ12GP201TESLASHML datasheet(177/242 Pages) MICROCHIP

177 / 242 page

Preliminary

DS70264B-page 175

dsPIC33FJ12GP201/202

FWDTEN

FWDT

Watchdog Timer Enable bit

1 = Watchdog Timer always enabled (LPRC oscillator cannot be disabled.

Clearing the SWDTEN bit in the RCON register will have no effect.)

0 = Watchdog Timer enabled/disabled by user software (LPRC can be

disabled by clearing the SWDTEN bit in the RCON register)

WINDIS

FWDT

Watchdog Timer Window Enable bit

1 = Watchdog Timer in Non-Window mode

0 = Watchdog Timer in Window mode

WDTPRE

FWDT

Watchdog Timer Prescaler bit

1 = 1:128

0 = 1:32

WDTPOST<3:0>

FWDT

Watchdog Timer Postscaler bits

1111 = 1:32,768

1110 = 1:16,384

0001 = 1:2

0000 = 1:1

ALTI2C

FPOR

Alternate I2C™ pins

1 = I2C mapped to SDA1/SCL1 pins

0 = I2C mapped to ASDA1/ASCL1 pins

FPWRT<2:0>

FPOR

Power-on Reset Timer Value Select bits

111 = PWRT = 128 ms

110 = PWRT = 64 ms

101 = PWRT = 32 ms

100 = PWRT = 16 ms

011 = PWRT = 8 ms

010 = PWRT = 4 ms

001 = PWRT = 2 ms

000 = PWRT = Disabled

TABLE 18-2:

dsPIC33FJ12GP201/202 CONFIGURATION BITS DESCRIPTION (CONTINUED)

Bit Field

Description

DSPIC33FJ12GP201TE/ML Datasheet(PDF) 177 Page - Microchip Technology

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