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STM32F207IC Datasheet(PDF) 117 Page - STMicroelectronics

Part # STM32F207IC
Description  ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/1284KB RAM
PDF  177 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F207IC Datasheet(HTML) 117 Page - STMicroelectronics

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STM32F20xxx
Electrical characteristics
Doc ID 15818 Rev 9
117/177
a
Note:
ADC accuracy vs. negative injection current: injecting a negative current on any analog input
pins should be avoided as this significantly reduces the accuracy of the conversion being
performed on another analog input. It is recommended to add a Schottky diode (pin to
ground) to analog pins which may potentially inject negative currents.
Any positive injection current within the limits specified for IINJ(PIN) and ΣIINJ(PIN) in
Section 5.3.16 does not affect the ADC accuracy.
Figure 49.
ADC accuracy characteristics
1.
Example of an actual transfer curve.
2.
Ideal transfer curve.
3.
End point correlation line.
4.
ET = Total Unadjusted Error: maximum deviation between the actual and the ideal transfer curves.
EO = Offset Error: deviation between the first actual transition and the first ideal one.
EG = Gain Error: deviation between the last ideal transition and the last actual one.
ED = Differential Linearity Error: maximum deviation between actual steps and the ideal one.
EL = Integral Linearity Error: maximum deviation between any actual transition and the end point
correlation line.
Table 65.
ADC accuracy (1)
1.
Better performance could be achieved in restricted VDD, frequency and temperature ranges.
Symbol
Parameter
Test conditions
Typ
Max(2)
2.
Based on characterization, not tested in production.
Unit
ET
Total unadjusted error
fPCLK2 = 60 MHz,
fADC = 30 MHz, RAIN < 10 kΩ,
VDDA = 1.8
(3) to 3.6 V
3.
If IRROFF is set to VDD, this value can be lowered to 1.7 V when the device operates in the 0 to 70 °C
temperature range.
±2
±5
LSB
EO
Offset error
±1.5
±2.5
EG
Gain error
±1.5
±3
ED
Differential linearity error
±1
±2
EL
Integral linearity error
±1.5
±3
EO
EG
1L SBIDEAL
4095
4094
4093
5
4
3
2
1
0
7
6
1
2
3
456
7
4093 4094 4095 4096
(1)
(2)
ET
ED
EL
(3)
VDDA
VSSA
ai14395c
VREF+
4096
(or
depending on package)]
VDDA
4096
[1LSBIDEAL =



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