STM32F207IC datasheet(157/177 Pages) STMICROELECTRONICS

157 / 177 page

STM32F20xxx

Application block diagrams

Doc ID 15818 Rev 9

157/177

A.2

Application example with regulator OFF

Figure 84.

Regulator OFF/internal reset ON

This mode is available only on UFBGA176 and WLCSP64+2 packages.

In regulator bypass mode, PA0 is used as power-on reset. The connection between PA0 and NRST can consequently

prevent debug connection. If the debug connection under reset or pre-reset is required, the user must manage the reset

and the power-on reset separately.

Figure 85.

Regulator OFF/ internal reset OFF

This mode is available only on WLCSP64+2 package.

REGOFF

VCAP_1

ai18476

VCAP_2

PA0

NRST

Application reset signal

(optional)

1.2 V

VDD

(1.8 to 3.6 V)

Power-down reset risen

after VCAP_1/VCAP_2 stabilization

REGOFF

VCAP_1

VCAP_2

PA0

1.2 V

VDD

(1.8 to 3.6 V)

Power-down reset risen

before VCAP_1/VCAP_2 stabilization

NRST

IRROFF

VDD

Application reset

signal (optional)

VCAP_1/2 monitoring

Ext. reset controller active

when VCAP_1/2 < 1.08 V

REGOFF

VCAP_1

ai18477

VCAP_2

NRST

1.2 V

IRROFF

VDD

(1.65 to 3.6 V)

VDD

1.2 V

VDD

VDD/VCAP_1/2 monitoring

Ext. reset controller active

when VDD < 1.65 V

and VCAP_1/2 < 1.08 V

VDD

STM32F207IC Datasheet(PDF) 157 Page - STMicroelectronics

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