PIC16F882-I datasheet(226/328 Pages) MICROCHIP

226 / 328 page

PIC16F882/883/884/886/887

DS41291F-page 224

14.5

Watchdog Timer (WDT)

The WDT has the following features:

• Operates from the LFINTOSC (31 kHz)

• Contains a 16-bit prescaler

• Shares an 8-bit prescaler with Timer0

• Time-out period is from 1 ms to 268 seconds

• Configuration bit and software controlled

WDT is cleared under certain conditions described in

Table 14-7.

14.5.1

WDT OSCILLATOR

The WDT derives its time base from the 31 kHz

LFINTOSC. The LTS bit of the OSCCON register does

not reflect that the LFINTOSC is enabled.

The value of WDTCON is ‘---0 1000’ on all Resets.

This gives a nominal time base of 17 ms.

14.5.2

WDT CONTROL

The WDTE bit is located in the Configuration Word

When the WDTE bit in the Configuration Word

SWDTEN bit can be used to enable and disable the

WDT. Setting the bit will enable it and clearing the bit

will disable it.

The PSA and PS<2:0> bits of the OPTION register

have the same function as in previous versions of the

PIC16F882/883/884/886/887

Family

microcon-

trollers. See Section 5.0 “Timer0 Module” for more

information.

FIGURE 14-9:

WATCHDOG TIMER BLOCK DIAGRAM

Note:

When the Oscillator Start-up Timer (OST)

is invoked, the WDT is held in Reset,

because the WDT Ripple Counter is used

by the OST to perform the oscillator delay

count. When the OST count has expired,

the WDT will begin counting (if enabled).

TABLE 14-7:

WDT STATUS

Conditions

WDT

WDTE = 0

Cleared

CLRWDT

Command

Oscillator Fail Detected

Exit Sleep + System Clock = T1OSC, EXTRC, INTOSC, EXTCLK

Exit Sleep + System Clock = XT, HS, LP

Cleared until the end of OST

31 kHz

PSA

16-bit WDT Prescaler

From TMR0 Clock Source

Prescaler(1)

PS<2:0>

PSA

WDT Time-out

WDTPS<3:0>

WDTE from the Configuration Word Register 1

SWDTEN from WDTCON

LFINTOSC Clock

Note

This is the shared Timer0/WDT prescaler. See Section 5.1.3 “Software Programmable Prescaler” for more information.

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