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IO20PDB0V0 Datasheet(PDF) 147 Page - Microsemi Corporation |
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IO20PDB0V0 Datasheet(HTML) 147 Page - Microsemi Corporation |
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147 / 197 page  SmartFusion Customizable System-on-Chip (cSoC) Re vi s i on 12 5 - 33 W14 ADC5 CM2 CM2 W15 NC ABPS5 ABPS5 W16 GNDAQ GNDAQ GNDAQ W17 NC VCC33SDD1 VCC33SDD1 W18 NC GNDSDD1 GNDSDD1 W19 PTBASE PTBASE PTBASE W21 SPI_0_DI/GPIO_17 SPI_0_DI/GPIO_17 SPI_0_DI/GPIO_17 Y1 VCC33AP VCC33AP VCC33AP Y21 SPI_0_DO/GPIO_16 SPI_0_DO/GPIO_16 SPI_0_DO/GPIO_16 Pin No. CS288 A2F060 Function A2F200 Function A2F500 Function Notes: 1. Shading denotes pins that do not have completely identical functions from density to density. For example, the bank assignment can be different for an I/O, or the function might be available only on a larger density device. 2. *: Indicates that the signal assigned to the pins as a CLKBUF/CLKBUF_LVPECL/CLKBUF_LVDS goes through a glitchless mux. In order for the glitchless mux to operate correctly, the signal must be a free-running clock signal. Refer to the ’Glitchless MUX’ section in the SmartFusion Microcontroller Subsystem User’s Guide for more details. |
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