IO10PDB0V0 datasheet(111/197 Pages) MICROSEMI

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SmartFusion Customizable System-on-Chip (cSoC)

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4 – SmartFusion Programming

SmartFusion cSoCs have three separate flash areas that can be programmed:

1. The FPGA fabric

2. The embedded nonvolatile memories (eNVMs)

3. The embedded flash ROM (eFROM)

There are essentially three methodologies for programming these areas:

1. In-system programming (ISP)

2. In-application programming (IAP)

a. A2F060 and A2F500: The FPGA fabric, eNVM, and eFROM

b. A2F200: Only the FPGA fabric and the eNVM

3. Pre-programming (non-ISP)

Programming, whether ISP or IAP methodologies are employed, can be done in two ways:

1. Securely using the on chip AES decryption logic

2. In plain text

In-System Programming

In-System Programming is performed with the aid of external JTAG programming hardware. Table 4-1

describes the JTAG programming hardware that will program a SmartFusion cSoC and Table 4-2 defines

the JTAG pins that provide the interface for the programming hardware.

Table 4-1 • Supported JTAG Programming Hardware

Dongle

Source

JTAG

SWD1

SWV2

Program

FPGA

Program

eFROM

Program

eNVM

FlashPro3/4

SoC Products Group

Yes

ULINK Pro

Keil

Yes

Yes3

Yes

ULINK2

Keil

Yes

Yes3

Yes

IAR J-Link

IAR

Yes

Yes3

Yes

Notes:

1. SWD = ARM Serial Wire Debug

2. SWV = ARM Serial Wire Viewer

3. Planned support

Table 4-2 • JTAG Pin Descriptions

Pin Name

Description

JTAGSEL

ARM Cortex-M3 or FPGA test access port (TAP) controller selection

TRSTB

Test reset bar

TCK

Test clock

TMS

Test mode select

TDI

Test data input

TDO

Test data output

IO10PDB0V0 Datasheet(PDF) 111 Page - Microsemi Corporation

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