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IO10PDB0V0 Datasheet(PDF) 138 Page - Microsemi Corporation

Part # IO10PDB0V0
Description  SmartFusion Customizable System-on-Chip (cSoC)
PDF  197 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

IO10PDB0V0 Datasheet(HTML) 138 Page - Microsemi Corporation

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Pin Descriptions
5- 24
R e v i sio n 1 2
Pin
No.
CS288
A2F060 Function
A2F200 Function
A2F500 Function
A1
VCCFPGAIOB0
VCCFPGAIOB0
VCCFPGAIOB0
A2
GNDQ
GNDQ
GNDQ
A3
EMC_CLK/IO00NDB0V0
EMC_CLK/GAA0/IO00NDB0V0
EMC_CLK/GAA0/IO02NDB0V0
A4
EMC_RW_N/IO00PDB0V0
EMC_RW_N/GAA1/IO00PDB0V0
EMC_RW_N/GAA1/IO02PDB0V0
A5
GND
GND
GND
A6
EMC_CS1_N/IO01PDB0V0
EMC_CS1_N/GAB1/IO01PDB0V0
EMC_CS1_N/GAB1/IO05PDB0V0
A7
EMC_CS0_N/IO01NDB0V0
EMC_CS0_N/GAB0/IO01NDB0V0
EMC_CS0_N/GAB0/IO05NDB0V0
A8
EMC_AB[0]/IO04NPB0V0
EMC_AB[0]/IO04NPB0V0
EMC_AB[0]/IO06NPB0V0
A9
VCCFPGAIOB0
VCCFPGAIOB0
VCCFPGAIOB0
A10
EMC_AB[4]/IO06NDB0V0
EMC_AB[4]/IO06NDB0V0
EMC_AB[4]/IO10NDB0V0
A11
EMC_AB[8]/IO08NPB0V0
EMC_AB[8]/IO08NPB0V0
EMC_AB[8]/IO13NPB0V0
A12
EMC_AB[14]/IO11NPB0V0
EMC_AB[14]/IO11NPB0V0
EMC_AB[14]/IO15NPB0V0
A13
GND
GND
GND
A14
EMC_AB[18]/IO13NDB0V0
EMC_AB[18]/IO13NDB0V0
EMC_AB[18]/IO18NDB0V0
A15
EMC_AB[24]/IO16NDB0V0
EMC_AB[24]/IO16NDB0V0
EMC_AB[24]/IO20NDB0V0
A16
EMC_AB[25]/IO16PDB0V0
EMC_AB[25]/IO16PDB0V0
EMC_AB[25]/IO20PDB0V0
A17
VCCFPGAIOB0
VCCFPGAIOB0
VCCFPGAIOB0
A18
EMC_AB[20]/IO14NDB0V0
EMC_AB[20]/IO14NDB0V0
EMC_AB[20]/IO21NDB0V0
A19
EMC_AB[21]/IO14PDB0V0
EMC_AB[21]/IO14PDB0V0
EMC_AB[21]/IO21PDB0V0
A20
GNDQ
GNDQ
GNDQ
A21
GND
GND
GND
AA1
ADC1
ABPS1
ABPS1
AA2
GNDAQ
GNDAQ
GNDAQ
AA3
GNDA
GNDA
GNDA
AA4
VCC33N
VCC33N
VCC33N
AA5
SDD0
SDD0
SDD0
AA6
ADC0
ABPS0
ABPS0
AA7
NC
GNDTM0
GNDTM0
AA8
NC
ABPS2
ABPS2
AA9
NC
VAREF0
VAREF0
AA10
NC
GND15ADC0
GND15ADC0
Notes:
1. Shading denotes pins that do not have completely identical functions from density to density. For example, the bank
assignment can be different for an I/O, or the function might be available only on a larger density device.
2. *: Indicates that the signal assigned to the pins as a CLKBUF/CLKBUF_LVPECL/CLKBUF_LVDS goes through a
glitchless mux. In order for the glitchless mux to operate correctly, the signal must be a free-running clock signal. Refer to
the ’Glitchless MUX’ section in the SmartFusion Microcontroller Subsystem User’s Guide for more details.



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