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LTC4357 Datasheet(PDF) 8 Page - Linear Technology |
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LTC4357 Datasheet(HTML) 8 Page - Linear Technology |
8 / 14 page LTC4357 4357fd Design Example The following design example demonstrates the calcula- tions involved for selecting components in a 12V system with 10A maximum load current (see Figure 4). First,calculatetheRDS(ON)oftheMOSFETtoachievethede- sired forward drop at full load. Assuming VDROP = 0.1V, RDS(ON) ≤ VDROP ILOAD = 0.1V 10A RDS(ON) ≤10mΩ The Si4874DY offers a good solution, in an S8 package with RDS(ON) = 10mΩ(max) and BVDSS of 30V. The maximum power dissipation in the MOSFET is: P = ILOAD2 • RDS(ON) = (10A)2 • 10mΩ = 1W With less than 39µF of local bypass, the recommended RC values of 100 Ω and 0.1µF were used in Figure 4. Since BVDSS + VIN is much less than 100V, output clamp- ing is unnecessary. Figure 3. Protecting Against Collapse of VDD During Reverse Recovery applications inForMation Figure 2. Reverse Recovery Produces Inductive Spikes at the IN and OUT Pin. The Polarity of Step Recovery Spikes is Shown Across Parasitic Inductances 4357 F02 LTC4357 + – GND IN OUT VDD GATE M1 REVERSE RECOVERY CURRENT VIN INPUT SHORT DIN SBR1U- 150SA INPUT PARASITIC INDUCTANCE COUT 10µF VOUT CLOAD DCLAMP SMAT70A OR + – OUTPUT PARASITIC INDUCTANCE 4357 F03 LTC4357 GND IN OUT VDD GATE M1 OUTPUT PARASITIC INDUCTANCE VIN R1 100 C1 100nF INPUT SHORT COUT VOUT CLOAD OR Figure 4. 12V, 10A Diode-OR 4357 F04 LTC4357 GND IN OUT VDD GATE M2 Si4874DY VIN2 12V R1 100 C1 0.1µF R1 100 C1 0.1µF LTC4357 GND IN OUT VDD GATE M1 Si4874DY VIN1 12V VOUT TO LOAD |
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