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BQ24725ARGRR Datasheet(PDF) 3 Page - Texas Instruments |
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BQ24725ARGRR Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 47 page  1 2 3 4 5 6 7 8 9 10 15 14 13 12 11 20 19 18 17 16 ACN ACP CMSRC ACDRV ACOK BATDRV SRN SRP GND LODRV bq24725A bq24725A www.ti.com SLUSAL0A – SEPTEMBER 2011 – REVISED AUGUST 2014 5 Pin Configuration and Functions RGR Package Top View Pin Functions PIN DESCRIPTION NO. NAME 1 ACN Input current sense resistor negative input. Place an optional 0.1µF ceramic capacitor from ACN to GND for common- mode filtering. Place a 0.1µF ceramic capacitor from ACN to ACP to provide differential mode filtering. 2 ACP Input current sense resistor positive input. Place a 0.1µF ceramic capacitor from ACP to GND for common-mode filtering. Place a 0.1µF ceramic capacitor from ACN to ACP to provide differential-mode filtering. 3 CMSRC ACDRV charge pump source input. Place a 4k Ω resistor from CMSRC to the common source of ACFET (Q1) and RBFET (Q2) limits the in-rush current on CMSRC pin. 4 ACDRV Charge pump output to drive both adapter input n-channel MOSFET (ACFET) and reverse blocking n-channel MOSFET (RBFET). ACDRV voltage is 6V above CMSRC when voltage on ACDET pin is between 2.4V to 3.15V, voltage on VCC pin is above UVLO and voltage on VCC pin is 275mV above voltage on SRN pin so that ACFET and RBFET can be turned on to power the system by AC adapter. Place a 4k Ω resistor from ACDRV to the gate of ACFET and RBFET limits the in-rush current on ACDRV pin. 5 ACOK AC adapter detection open drain output. It is pulled HIGH to external pull-up supply rail by external pull-up resistor when voltage on ACDET pin is between 2.4V and 3.15V, and voltage on VCC is above UVLO and voltage on VCC pin is 275mV above voltage on SRN pin, indicating a valid adapter is present to start charge. If any one of the above conditions can not meet, it is pulled LOW to GND by internal MOSFET. Connect a 10k Ω pull up resistor from ACOK to the pull-up supply rail. 6 ACDET Adapter detection input. Program adapter valid input threshold by connecting a resistor divider from adapter input to ACDET pin to GND pin. When ACDET pin is above 0.6V and VCC is above UVLO, REGN LDO is present, ACOK comparator and IOUT are both active. 7 IOUT Buffered adapter or charge current output, selectable with SMBus command ChargeOption(). IOUT voltage is 20 times the differential voltage across sense resistor. Place a 100pF or less ceramic decoupling capacitor from IOUT pin to GND. 8 SDA SMBus open-drain data I/O. Connect to SMBus data line from the host controller or smart battery. Connect a 10k Ω pull- up resistor according to SMBus specifications. 9 SCL SMBus open-drain clock input. Connect to SMBus clock line from the host controller or smart battery. Connect a 10k Ω pull-up resistor according to SMBus specifications. 10 ILIM Charge current limit input. Program ILIM voltage by connecting a resistor divider from system reference 3.3V rail to ILIM pin to GND pin. The lower of ILIM voltage or DAC limit voltage sets charge current regulation limit. To disable the control on ILIM, set ILIM above 1.6V. Once voltage on ILIM pin falls below 75mV, charge is disabled. Charge is enabled when ILIM pin rises above 105mV. 11 BATDRV Charge pump output to drive Battery to System n-channel MOSFET (BATFET). BATDRV voltage is 6V above SRN to turn on BATFET to power the system from battery. BATDRV voltage is SRN voltage to turn off BATFET to power system from AC adapter. Place a 4k Ω resistor from BATDRV to the gate of BATFET limits the in-rush current on BATDRV pin. Copyright © 2011–2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: bq24725A |
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