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ICS8714004I Datasheet(PDF) 1 Page - Integrated Device Technology |
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ICS8714004I Datasheet(HTML) 1 Page - Integrated Device Technology |
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1 / 31 page  DATA SHEET ICS8714004DKI REVISION A MARCH 24, 2014 1 ©2014 Integrated Device Technology, Inc. FemtoClock® Zero Delay Buffer/ Clock Generator for PCI Express™ and Ethernet ICS8714004I General Description The ICS8714004I is Zero-Delay Buffer/Frequency Multiplier with four differential HCSL output pairs, and uses external feedback (differential feedback input and output pairs) for “zero delay” clock regeneration. In PCI Express and Ethernet applications, 100MHz and 125MHz are the most commonly used reference clock frequencies and each of the four output pairs can be independently set for either 100MHz or 125MHz. With an output frequency range of 98MHz to 165MHz, the device is also suitable for use in a variety of other applications such as Fibre Channel (106.25MHz) and XAUI (156.25MHz). The M-LVDS Input/Output pair is useful in backplane applications when the reference clock can either be local (on the same board as the ICS8714004I) or remote via a backplane connector. In output mode, an input from a local reference clock applied to the CLK, nCLK input pins is translated to M-LVDS and driven out to the MLVDS, nMLVDS pins. In input mode, the internal M-LVDS driver is placed in a High-Impedance state using the OE_MLVDS pin and MLVDS, nMLVDS pin then becomes an input (e.g. from a backplane). The ICS8714004I uses low phase noise FemtoClock technology, thus making it ideal for such applications as PCI Express Generation 1, 2 and 3 as well as for Gigabit Ethernet, Fibre Channel, and 10 Gigabit Ethernet. It is packaged in a 40-VFQFN package (6mm x 6mm). Features • Four 0.7V differential HCSL output pairs, individually selectable for 100MHz or 125MHz for PCIe and Ethernet applications • One differential clock input pair CLK, nCLK can accept the following differential input levels: LVPECL, LVDS, M-LVDS, LVHSTL, HCSL • One M-LVDS I/O pair (MLVDS, nMLVDS) • Output frequency range: 98MHz - 165MHz • Input frequency range: 19.6MHz - 165MHz • VCO range: 490MHz - 660MHz • PCI Express (2.5 Gb/s), Gen 2 (5 Gb/s), and Gen 3 (8 Gb/s) jitter compliant • External feedback for “zero delay” clock regeneration • RMS phase jitter @ 125MHz (1.875MHz – 20MHz): 0.558ps (typical) • Full 3.3V supply mode • -40°C to 85°C ambient operating temperature • Lead-free (RoHs 6) packaging Pin Assignment 11 12 13 14 15 16 17 18 19 20 1 2 3 4 5 6 7 8 9 10 30 29 28 27 26 25 24 23 22 21 OE_MLVDS VDD MLVDS nMLVDS PLL_SEL FBO_DIV MR OE0 OE1 GND VDD Q2 nQ2 GND Q3 nQ3 FBOUT nFBOUT VDD IREF 40 39 38 37 36 35 34 33 32 31 ICS8714004I 40-Lead VFQFN 6mm x 6mm x 0.925mm package body 4.65mm x 4.65mm Epad Size K Package Top View |
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