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ICS8714004I Datasheet(PDF) 12 Page - Integrated Device Technology |
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ICS8714004I Datasheet(HTML) 12 Page - Integrated Device Technology |
12 / 31 page ICS8714004DKI REVISION A MARCH 24, 2014 12 ©2014 Integrated Device Technology, Inc. ICS8714004I Data Sheet FemtoCLock® Zero Delay Buffer/Clock Generator for PCI Express™ and Ethernet Parameter Measurement Information 3.3V HCSL Output Load Test Circuit 3.3V M-LVDS Output Load Test Circuit Output Skew 3.3V HCSL Output Load Test Circuit Differential Input Level Cycle-to-Cycle Jitter Measurement Point Measurement Point GND 2pF 2pF 0V IREF 0V VDDA VDD 3.3V±5% This load condition is used for VMAX, VMIN, VRB, tSTABLE, VCROSS, V CROSS and Rise/Fall Edge Rate measurements. 3.3V±5% SCOPE Qx nQx 3.3V±5% POWER SUPPLY +– Float GND VDDA VDD nQx Qx nQy Qy This load condition is used for IDD, tjit(cc), tjit(Ø) and tsk(o) measurements. 3.3V±5% VDDA VDD 3.3V±5% V CMR Cross Points V PP VDD GND nCLK CLK Q0:Q3, FBOUT nQ0:Q3, nFBOUT tcycle n tcycle n+1 tjit(cc) = |tcycle n – tcycle n+1| 1000 Cycles |
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