PIC17C44-08SLASHP datasheet(117/240 Pages) MICROCHIP

117 / 240 page

DS30412C-page 117

PIC17C4X

CALL

Subroutine Call

Syntax:

[

label ] CALL k

Operands:

≤ k ≤ 4095

Operation:

PC+ 1

→ TOS, k → PC<12:0>,

k<12:8>

→ PCLATH<4:0>;

PC<15:13>

→ PCLATH<7:5>

Status Affected:

None

Encoding:

111k

kkkk

Description:

Subroutine call within 8K page. First,

return address (PC+1) is pushed onto

the stack. The 13-bit value is loaded into

PC bits<12:0>. Then the upper-eight

bits of the PC are copied into PCLATH.

Call

is a two-cycle instruction.

See LCALL for calls outside 8K memory

space.

Words:

Cycles:

Q Cycle Activity:

Decode

Read literal

'k'<7:0>

Execute

NOP

Forced NOP

NOP

Execute

NOP

Example:

HERE

CALL

THERE

Before Instruction

PC =

Address(HERE)

After Instruction

PC =

Address(THERE)

TOS =

Address (HERE + 1)

CLRF

Clear f

Syntax:

[

label] CLRF

f,s

Operands:

≤ f ≤ 255

Operation:

00h

→ f, s ∈ [0,1]

00h

→ dest

Status Affected:

None

Encoding:

0010

100s

ffff

Description:

Clears the contents of the speciﬁed reg-

ister(s).

s = 0: Data memory location 'f' and

WREG are cleared.

s = 1: Data memory location 'f' is

cleared.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Execute

Write

and other

speciﬁed

Example:

CLRF

FLAG_REG

Before Instruction

FLAG_REG

0x5A

After Instruction

FLAG_REG

0x00

PIC17C44-08/P Datasheet(PDF) 117 Page - Microchip Technology

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