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PIC17C44-08/P Datasheet(PDF) 162 Page - Microchip Technology |
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PIC17C44-08/P Datasheet(HTML) 162 Page - Microchip Technology |
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162 / 240 page ![]() PIC17C4X DS30412C-page 162 © 1996 Microchip Technology Inc. Applicable Devices 42 R42 42A 43 R43 44 FIGURE 17-12: MEMORY INTERFACE READ TIMING TABLE 17-12: MEMORY INTERFACE READ REQUIREMENTS Parameter No. Sym Characteristic Min Typ† Max Units Conditions 150 TadV2alL AD<15:0> (address) valid to ALE ↓ (address setup time) 0.25Tcy - 30 — — ns 151 TalL2adI ALE ↓ to address out invalid (address hold time) 5* — — ns 160 TadZ2oeL AD<15:0> high impedance to OE ↓ 0* — — ns 161 ToeH2adD OE ↑ to AD<15:0> driven 0.25Tcy - 15 — — ns 162 TadV2oeH Data in valid before OE ↑ (data setup time) 35 — — ns 163 ToeH2adI OE ↑to data in invalid (data hold time) 0 — — ns 164 TalH ALE pulse width — 0.25TCY § — ns 165 ToeL OE pulse width 0.5Tcy - 35 § — — ns 166 TalH2alH ALE ↑ to ALE↑ (cycle time) — TCY § — ns 167 Tacc Address access time — — 0.75 TCY-40 ns 168 Toe Output enable access time (OE low to Data Valid) — — 0.5 TCY - 60 ns * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. § This specification guaranteed by design. OSC1 ALE OE AD<15:0> WR Q1 Q2 Q3 Data in Addr out 150 151 160 166 165 163 161 '1' '1' Q4 Q1 Q2 Addr out 164 168 167 162 |
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