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TLE42994GM Datasheet(PDF) 9 Page - Infineon Technologies AG |
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TLE42994GM Datasheet(HTML) 9 Page - Infineon Technologies AG |
9 / 36 page TLE42994 Pin Configuration Data Sheet 9 Rev. 1.2, 2014-07-03 3.5 Pin Assignment TLE42994E (PG-SSOP-14 exposed pad) Figure 5 Pin Configuration (top view) 3.6 Pin Definitions and Functions TLE42994E (PG-SSOP-14 exposed pad) Pin Symbol Function 1RADJ Reset Threshold Adjust connect an external voltage divider to adjust reset threshold; connect to GND for using internal threshold 2, 6 n.c. not connected leave open or connect to GND 3D Reset Delay Timing connect a ceramic capacitor to GND for adjusting the reset delay time; leave open if the reset function is not needed 4GND Ground connect all pins to PCB and heatsink area 5EN Enable high signal enables the regulator; low signal disables the regulator; connect to I if the Enable function is not needed 7RO Reset Output open collector output; internally linked to the output via a 20kΩ pull-up resistor; leave open if the reset function is not needed 8SO Sense Output open collector output; internally linked to the output via a 20kΩ pull-up resistor; leave open if the sense comparator is not needed 9, 10, 12 n.c. not connected leave open or connect to GND 11 Q Output block to GND with a capacitor close to the IC terminals, respecting the values given for its capacitance C Q and ESR in the table “Functional Range” on Page 12 13 I Input for compensating line influences, a capacitor to GND close to the IC terminals is recommended SI SO n.c. n.c. Q n.c. I RADJ RO n.c. EN GND D n.c. 1 2 3 4 5 6 7 14 9 10 11 12 13 8 PINCONFIG_SSOP-14.VSD |
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