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PIC17LC44-08/P Datasheet(PDF) 139 Page - Microchip Technology

Part # PIC17LC44-08/P
Description  High-Performance 8-Bit CMOS EPROM/ROM Microcontroller
PDF  240 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC17LC44-08/P Datasheet(HTML) 139 Page - Microchip Technology

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© 1996 Microchip Technology Inc.
DS30412C-page 139
PIC17C4X
TABLWT
Table Write
Example1:
TABLWT
0, 1, REG
Before Instruction
REG
=
0x53
TBLATH
=
0xAA
TBLATL
=
0x55
TBLPTR
=
0xA356
MEMORY(TBLPTR)
=
0xFFFF
After Instruction (table write completion)
REG
=
0x53
TBLATH
=
0x53
TBLATL
=
0x55
TBLPTR
=
0xA357
MEMORY(TBLPTR - 1) =
0x5355
Example 2:
TABLWT
1, 0, REG
Before Instruction
REG
=
0x53
TBLATH
=
0xAA
TBLATL
=
0x55
TBLPTR
=
0xA356
MEMORY(TBLPTR)
=
0xFFFF
After Instruction (table write completion)
REG
=
0x53
TBLATH
=
0xAA
TBLATL
=
0x53
TBLPTR
=
0xA356
MEMORY(TBLPTR)
=
0xAA53
Program
Memory
16 bits
15
0
TBLPTR
TBLAT
Data
Memory
8 bits
15
8
70
TLRD
Table Latch Read
Syntax:
[
label ] TLRD t,f
Operands:
0
≤ f ≤ 255
t
∈ [0,1]
Operation:
If t = 0,
TBLATL
→ f;
If t = 1,
TBLATH
→ f
Status Affected:
None
Encoding:
1010
00tx
ffff
ffff
Description:
Read data from 16-bit table latch
(TBLAT) into file register 'f'. Table Latch
is unaffected.
If t = 1; high byte is read
If t = 0; low byte is read
This instruction is used in conjunction
with TABLRD to transfer data from pro-
gram memory to data memory.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register
TBLATH or
TBLATL
Execute
Write
register 'f'
Example:
TLRD
t, RAM
Before Instruction
t=
0
RAM
=
?
TBLAT
=
0x00AF
(TBLATH = 0x00)
(TBLATL = 0xAF)
After Instruction
RAM
=
0xAF
TBLAT
=
0x00AF
(TBLATH = 0x00)
(TBLATL = 0xAF)
Before Instruction
t=
1
RAM
=
?
TBLAT
=
0x00AF
(TBLATH = 0x00)
(TBLATL = 0xAF)
After Instruction
RAM
=
0x00
TBLAT
=
0x00AF
(TBLATH = 0x00)
(TBLATL = 0xAF)
Program
Memory
16 bits
15
0
TBLPTR
TBLAT
Data
Memory
8 bits
15
8
70



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