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TAS5760LDAPR Datasheet(PDF) 43 Page - Texas Instruments

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Part # TAS5760LDAPR
Description  General-Purpose I2S Input Class-D Amplifier
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TAS5760LDAPR Datasheet(HTML) 43 Page - Texas Instruments

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TAS5760L
www.ti.com
SLOS782B – JULY 2013 – REVISED SEPTEMBER 2015
10.2.1.2.3.1
I²C Pullup Resistors
It is important to note that when the device is operated in Software Control Mode, the customary pullup resistors
are required on the SCL and SDA signal lines. They are not shown in the Typical Application Circuits, because
they are shared by all of the devices on the I²C bus and are considered to be part of the associated passive
components for the System Processor. These resistor values should be chosen per the guidance provided in the
I²C Specification.
10.2.1.2.3.2
Digital I/O Connectivity
The digital I/O lines of the TAS5760L are described in previous sections. As discussed, whenever a static digital
pin (that is a pin that is hardwired to be HIGH or LOW) is required to be pulled HIGH, it should be connected to
DVDD through a pullup resistor to control the slew rate of the voltage presented to the digital I/O pins. It is not,
however, necessary to have a separate pullup resistor for each static digital I/O line. Instead, a single resistor
can be used to tie all static I/O lines HIGH to reduce BOM count. For instance, if Software Control Mode is
desired both the GAIN[1:0] and the PBTL/SCL pins can both be pulled HIGH through a single pullup resistor.
10.2.1.2.4
Recommended Startup and Shutdown Procedures
The start up and shutdown procedures for both Hardware Control Mode and Software Control Mode are shown
below.
10.2.1.3 Application Curve
Table 10. Relevant Performance Plots
PLOT TITLE
PLOT NUMBER
Figure 1. Output Power vs PVDD
G001
Figure 2. THD+N vs Frequency With PVDD = 12 V, POSPK = 1 W
G024
Figure 5. THD+N vs Output Power With PVDD = 12 V, Both Channels Driven
G027
Figure 7. Efficiency vs Output Power
G030
Figure 8. Crosstalk vs Frequency
G031
Figure 9. PVDD PSRR vs Frequency
G019
Figure 10. DVDD PSRR vs Frequency
G020
Figure 11. Idle Current Draw vs PVDD (Filterless)
G042
Figure 12. Idle Current Draw vs PVDD (With LC Filter as Shown on the EVM)
G023
Figure 13. Shutdown Current Draw vs PVDD (Filterless)
G022
Figure 14. Output Power vs PVDD
G039
Figure 15. THD+N vs Frequency With PVDD = 12 V, POSPK = 1 W
G002
Figure 18. THD+N vs Output Power With PVDD = 12 V, Both Channels Driven
G008
Figure 20. Efficiency vs Output Power
G014
Figure 21. Crosstalk vs Frequency
G018
Figure 22. PVDD PSRR vs Frequency
G019
Figure 23. Idle Current Draw vs PVDD (Filterless)
G045
Figure 24. Idle Current Draw vs PVDD (With LC Filter as Shown on EVM)
G044
Figure 25. Shutdown Current Draw vs PVDD (Filterless)
G022
Copyright © 2013–2015, Texas Instruments Incorporated
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