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ADIS16488A Datasheet(PDF) 4 Page - Analog Devices |
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ADIS16488A Datasheet(HTML) 4 Page - Analog Devices |
4 / 35 page ![]() Product Overview Online Documentation Design Resources Discussion Sample & Buy ADIS16488A Data Sheet Rev. C | Page 4 of 35 Parameter Test Conditions/Comments Min Typ Max Unit Sensitivity BAROM_OUT and BAROM_LOW (32-bit) 6.1 × 10−7 mbar/LSB Error with Supply 0.04 %/V Total Error 4.5 mbar Relative Error 3 −40°C ≤ TC ≤ +85°C 2.5 mbar Nonlinearity4 Best fit straight line, FS = 1100 mbar 0.1 % of FS −40°C ≤ TC ≤ +85°C 0.2 % of FS Linear-g Sensitivity ±1 g, 1 σ 0.005 mbar/g Noise 0.025 mbar rms TEMPERATURE SENSOR Scale Factor Output = 0x0000 at 25°C (±5°C) 0.00565 °C/LSB LOGIC INPUTS5 Input High Voltage, VIH 2.0 V Input Low Voltage, VIL 0.8 V CS Wake-Up Pulse Width 20 µs Logic 1 Input Current, IIH VIH = 3.3 V 10 µA Logic 0 Input Current, IIL VIL = 0 V All Pins Except RST 10 µA RST Pin 0.33 mA Input Capacitance, CIN 10 pF DIGITAL OUTPUTS Output High Voltage, VOH ISOURCE = 0.5 mA 2.4 V Output Low Voltage, VOL ISINK = 2.0 mA 0.4 V FLASH MEMORY Endurance 6 100,000 Cycles Data Retention7 TJ = 85°C 20 Years FUNCTIONAL TIMES8 Time until data is available Power-On Start-Up Time 500 ms Reset Recovery Time 9 500 ms Sleep Mode Recovery Time 500 µs Flash Memory Update Time 375 ms Test Time 50 ms Automatic Self Test Time Using internal clock, 100 SPS 12 ms CONVERSION RATE 2.46 kSPS Initial Clock Accuracy 0.02 % Temperature Coefficient 40 ppm/°C Sync Input Clock 0.7 10 2.4 kHz POWER SUPPLY, VDD Operating voltage range 3.0 3.6 V Power Supply Current 11 Normal mode, VDD = 3.3 V, µ ± σ 245 mA Sleep mode, VDD = 3.3 V 12.2 mA Power-down mode, VDD = 3.3 V 45 µA POWER SUPPLY, VDDRTC Operating voltage range 3.0 3.6 V Real-Time Clock Supply Current Normal mode, VDDRTC = 3.3 V 13 µA 1 The repeatability specifications represent analytical projections based on the following drift contributions and conditions: temperaturehysteresis (−40°C to +85°C), electronics drift (high temperature operating life test: +110°C,500 hours), drift from temperature cycling (JESD22, Method A104-C,Method N, 500 cycles, −55°C to +85°C), raterandom walk (10-year projection),and broadband noise. 2 Bias repeatability describesa long-term behavior over a variety of conditions. Short-term repeatability relates to the in-run bias stability and noise density specifications. 3 The relative error assumes that the initial error, at 25°C, is corrected in the end application. 4 Specification assumes a full scale (FS) of 1000 mbar. 5 The digital input/output signals use a 3.3 V system. 6 Endurance is qualified as per JEDEC Standard 22, Method A117, measured at −40°C, +25°C, +85°C, and +125°C. 7 The data retention specification assumes a junction temperature (TJ) of 85°C per JEDEC Standard 22, Method A117. Data retention lifetime decreases with TJ. 8 These times do not includethermal settling and internal filter responsetimes, which may affect overall accuracy. 9 The RST line must be in a low state for at least 10 μs to assure a proper reset initiation and recovery. 10 Device functionsat clock rates below 0.7kHz, butat reduced performance levels. 11 Supply current transients can reach 600 mA during initial start up or reset recovery. |
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