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PYB10-Q24-S5-DIN Datasheet(PDF) 5 Page - CUI INC |
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PYB10-Q24-S5-DIN Datasheet(HTML) 5 Page - CUI INC |
5 / 6 page ![]() cui.com CUI Inc │ SERIES: PYB10-DIN │ DESCRIPTION: DC-DC CONVERTER date 08/15/2013 │ page 5 of 6 1. Recommended circuit This series has been tested according to the following recommended testing circuit before leaving the factory. This series should be tested under load (see Figure 3). If you want to further decrease the input/output ripple, you can increase the capacitance accord- ingly or choose capacitors with low ESR (see table 3). However, the capacitance of the output filter capacitor must be appropriate. If the capacitance is too high, a startup problem might arise. For every channel of the output, to ensure safe and reliable operation, the maximum capacitance must be less than the maximum capacitive load (see Table 4). APPLICATION NOTES Figure 3 Table 3 Table 4 Vin (Vdc) Cin (μF) Cout (μF) 24 10~47 10 48 10~47 10 Notes: 1. Minimum load shouldn't be less than 5%, otherwise ripple may increase dramatically. Operation under minimum load will not damage the converter, however, they may not meet all specifications listed. 2. Maximum capacitive load is tested at input voltage range and full load. 3. All specifications are measured at Ta=25°C, humidity<75%, nominal input voltage and rated output load unless otherwise specified. Vin GND +Vo 0V DC Cin DC Cout Cout -Vo Dual O utput Single Output Vin GND +Vo 0V DC Cin DC Cout Single Vout (Vdc) Max. Capacitive Load (μF) Dual Vout (Vdc) Max. Capacitive Load4 (μF) 3.3 2200 -- -- 5 2200 5 680 12 4701 12 2203 15 3302 15 100 24 100 -- -- Notes: 1. 330 μF for 48Vin. 2. 220 μF for 48Vin. 3. 150 μF for 48Vin. 4. For each output. For more information, please visit the product page. |
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