RTL8201BL datasheet(22/29 Pages) ETC

Part #	RTL8201BL

Description	REALTEK SINGLE CHIP SINGLE PORT 10/100M FAST ETHERNET PHYCEIVER RTL8201BL

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Manufacturer	ETC [List of Unclassifed Manufacturers]

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RTL8201BL

2002-03-29

Rev.1.2

22

8.2 A.C. Characteristics

8.2.1 MII Timing of Transmission Cycle

Shown is an example transfer of a packet from MAC to PHY in MII interface.

Symbol

Description

Minimum

Typical

Maximum

Unit

100Mbps

14

20

26

ns

t1

TXCLK high pulse width

10Mbps

140

200

260

ns

100Mbps

14

20

26

ns

t2

TXCLK low pulse width

10Mbps

140

200

260

ns

100Mbps

40

ns

t3

TXCLK period

10Mbps

400

ns

100Mbps

10

24

ns

t4

TXEN, TXD[0:3] setup to TXCLK

rising edge

10Mbps

5

ns

100Mbps

10

25

ns

t5

TXEN,

TXD[0:3]

hold

after

TXCLK rising edge

10Mbps

5

ns

100Mbps

40

ns

t6

TXEN sampled to CRS high

10Mbps

400

ns

100Mbps

160

ns

t7

TXEN sampled to CRS low

10Mbps

2000

ns

100Mbps

60

70

140

ns

t8

Transmit latency

10Mbps

400

ns

100Mbps

100

170

ns

t9

Sampled TXEN inactive to end of

frame

10Mbps

ns

TXCLK

V

IH(min)

V

IL(max)

t

1

t

3

t

2

TXD[0:3]

TXEN

V

IH(min)

V

IL(max)

t

5

t

4

TXCLK

TXEN

TXD[0:3]

CRS

TPTX+-

t

6

t

8

t

9

t

7

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RTL8201BL Datasheet(PDF) 22 Page - List of Unclassifed Manufacturers

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