C8051F041

CAN2.0B 64KB ISP FLASH MCU

PRELIMINARY

UART1

SMBus

SPI Bus

PCA

Timers

0,1,2,3,4

VDD

VDD

VDD

DGND

DGND

DGND

/RST

XTAL1

XTAL2

Internal

2%

Oscillator

P2.0/CPx

P2.7/CPx

P0.0

P0.7

DAC1

DAC1

(12-Bit)

VREF

DAC0

(12-Bit)

AIN0.0

AIN0.1

AIN0.2

AIN0.3

DAC0

VREF

UART0

8:1

MONEN

WDT

VREFA

P7 Latch

P5 Latch

P6 Latch

P5

DRV

P6

DRV

P4

DRV

Addr [15:8]

Addr [7:0]

Ctrl Latch

Data Latch

A

M

U

X

8:2

HVAIN+

HVAIN-

HVREF

HVCAP

HVAMP

TEMP

SENSOR

P0

Drv

P1

Drv

P2

Drv

P3

Drv

Port

0,1,2,3

&4

Latches

CAN

2.0B

CRX0

CTX0

8

0

5

1

C

o

r

e

Reset

A

M

U

X

ADC

100ksps

(12-Bit)

External Data Memory Bus

32x136

CANRAM

256 byte

RAM

4K byte

XRAM

P3.0/AIN0.6

P3.7/AIN0.7

P1.0/AIN1.0

P1.7/AIN1.7

64K byte

FLASH

System

Clock

External

Oscillator

Circuit

VDD

Monitor

C

R

O

S

S

B

A

R

Data [7:0]

Address [15:0]

Bus Control

Digital Power

Port 4 <from crossbar>

A

M

U

X

ADC

500KS/s

(8-Bit)

P2.1

P2.0

+

-

CP0

P2.3

P2.2

+

-

CP1

P2.5

P2.4

+

-

CP2

SFR Bus

P7

DRV

Debug HW

Boundary Scan

JTAG

Logic

TCK

TMS

TDI

TDO

AGND

AGND

AV+

AV+

Analog Power

Prog

Gain

Prog

Gain

VREFA

ANALOG PERIPHERALS

12-bit ADC

-

±1LSB INL; Guaranteed Monotonic

-

Programmable Throughput up to 100ksps

-

12 External Inputs; Programmable as Single-Ended or Differential

-

Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5

-

Data Dependent Windowed Interrupt Generator

-

Built-in Temperature Sensor (

± 3°C)

High-Voltage Differential Amplifier

-

60V Common Mode Input Range

-

Offset Adjust from –60V to +60V

-

16 Gain Settings from 0.05 to 16

8-bit ADC

-

Programmable Throughput up to 500ksps

-

8 External Inputs; Programmable as Single-Ended or Differential

-

Programmable Amplifier Gain: 4, 2, 1, 0.5

Two 12-bit DACs

Three Comparators

Internal Voltage Reference

Precision VDD Monitor/Brown-out Detector

ON-CHIP JTAG DEBUG & BOUNDRY SCAN

-

On-Chip Debug Circuitry Facilitates Full Speed, Non-Intrusive In-

System Debug (No Emulator Required!)

-

Provides Breakpoints, Single Stepping, Watchpoints, Stack

Monitor, Program Trace Memory

-

Inspect/Modify Memory and Registers

-

Superior Performance to Emulation Systems Using ICE-Chips,

Target Pods, and Sockets

-

IEEE1149.1 Compliant Boundary Scan

HIGH SPEED 8051

µµµµC CORE

-

Pipe-lined Instruction Architecture; Executes 70% of Instructions in 1 or 2

System Clocks

-

Up to 25MIPS Throughput with 25MHz System Clock

-

Expanded Interrupt Handler

MEMORY

-

4352 Bytes Internal Data RAM (256 + 4k)

-

64k Bytes In-System Programmable FLASH Program Memory

-

External 64k Byte Data Memory Interface

CAN Bus 2.0B

-

32 Message Objects

-

“Mailbox” implementation only interrupts CPU when needed

DIGITAL PERIPHERALS

-

32 Port I/O; All are 5V tolerant

-

Ports Available Concurrently

-

Programmable 16-bit Counter Array with 6 Capture/Compare Modules

-

Five General Purpose 16-bit Counter/Timers

-

Dedicated Watch-Dog Timer; Bi-directional Reset

CLOCK SOURCES

-

Internal Programmable 2% Oscillator: Up to 25MHz

-

External Oscillator: Crystal, RC, C, or Clock

-

Real-Time Clock Mode using Timer 3 or PCA

SUPPLY VOLTAGE ......................... 2.7V to 3.6V

-

Typical Operating Current: 10mA @ 25MHz

-

Multiple Power Saving Sleep and Shutdown Modes

64-Pin TQFP; Temp Range –40

°°°°C to +85°°°°C

8.6.2002