ST72561 datasheet(226/262 Pages) STMICROELECTRONICS

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ST72561

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SUPPLY CURRENT CHARACTERISTICS (Cont’d)

12.4.2 WAIT and SLOW WAIT Modes (Flash devices)

Figure 123. Typical IDD in WAIT mode

Figure 124. Typical IDD in SLOW-WAIT vs. fOSC

Notes:

1. Typical data are based on TA=25°C, VDD=5V (4.5V≤VDD≤5.5V range) .

2. Data based on characterization results, tested in production at VDD max. and fCPU max.

3. Measurements are done in the following conditions:

- Progam executed from RAM, CPU running with RAM access. The increase in consumption when running in Flash is

30%. There is no increase when running in ROM.

- All I/O pins in input mode with a static value at VDD or VSS (no load)

- All peripherals in reset state.

- LVD disabled.

- Clock input (OSC1) driven by external square wave.

- In SLOW and SLOW WAIT mode, fCPU is based on fOSC divided by 32.

To obtain the total current consumption of the device, add the clock source (Section 12.5.3 ) and the peripheral power

consumption (Section 12.4.5).

Symbol

Parameter

Conditions

Typ 1)

Max 2)

Unit

IDD

Supply current in WAIT mode 3)

(see Figure 123)

fOSC=2MHz, fCPU=1MHz

fOSC=4MHz, fCPU=2MHz

fOSC=8MHz, fCPU=4MHz

fOSC=16MHz, fCPU=8MHz

1.45

5.6

3.0

4.0

5.0

7.0

Supply current in SLOW WAIT mode 3)

(see Figure 124)

fOSC=2MHz, fCPU=62.5kHz

fOSC=4MHz, fCPU=125kHz

fOSC=8MHz, fCPU=250kHz

fOSC=16MHz, fCPU=500MHz

0.4

0.5

0.6

0.8

1.2

1.3

1.8

2.0

3.5

4.5

5.5

Vdd (V)

fcpu 1MHz

fcpu 2MHz

fcpu 4MHz

fcpu 8MHz

3.5

4.5

5.5

Vdd (V)

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

fcpu 1MHz

fcpu 2MHz

fcpu 4MHz

fcpu 8MHz

ST72561 Datasheet(PDF) 226 Page - STMicroelectronics

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