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LM12L458 Datasheet(PDF) 22 Page - National Semiconductor (TI) |
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LM12L458 Datasheet(HTML) 22 Page - National Semiconductor (TI) |
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22 / 36 page  2.0 Internal User-Programmable Registers (Continued) Bits 0–7 hold “watchdog” limit #1. When Bit 11 of Instruction RAM “00” is set to a “1”, the LM12L458 performs a “watch- dog” comparison of the sampled analog input signal with the limit #1 value first, followed by a comparison of the same sampled analog input signal with the value found in limit #2 (Instruction RAM “10”). Bit 8 holds limit #1’s sign. Bit 9’s state determines the limit condition that generates a “watchdog” interrupt. A “1” causes a voltage greater than limit #1 to generate an interrupt, while a “0” causes a voltage less than limit #1 to generate an interrupt. Bits 10–15 are not used. Instruction RAM “10” The third Instruction RAM section is selected by placing a “10” in Bits 8 and 9 of the Configuration register. Bits 0–7 hold “watchdog” limit #2. When Bit 11 of Instruction RAM “00” is set to a “1”, the LM12L458 performs a “watch- dog” comparison of the sampled analog input signal with the limit #1 value first (Instruction RAM “01”), followed by a com- parison of the same sampled analog input signal with the value found in limit #2. Bit 8 holds limit #2’s sign. Bit 9’s state determines the limit condition that generates a “watchdog” interrupt. A “1” causes a voltage greater than limit #2 to generate an interrupt, while a “0” causes a voltage less than limit #2 to generate an interrupt. Bits 10–15 are not used. 2.2 CONFIGURATION REGISTER The Configuration register, 1000 (A4–A1, BW = 0) or 1000x (A4–A0, BW = 1) is a 16-bit control register with read/write capability. It acts as the LM12L458’s “control panel” holding global information as well as start/stop, reset, self-calibration, and stand-by commands. Bit 0 is the START/STOP bit. Reading Bit 0 returns an indi- cation of the Sequencer’s status. A “0” indicates that the Se- quencer is stopped and waiting to execute the next instruc- tion. A “1” shows that the Sequencer is running. Writing a “0” halts the Sequencer when the current instruction has fin- ished execution. The next instruction to be executed is pointed to by the instruction pointer found in the status reg- ister. A “1” restarts the Sequencer with the instruction cur- rently pointed to by the instruction pointer. (See Bits 8–10 in the Interrupt Status register.) Bit 1 is the LM12L458’s system RESET bit. Writing a “1” to Bit 1 stops the Sequencer (resetting the Configuration regis- ter’s START/STOP bit), resets the Instruction pointer to “000” (found in the Interrupt Status register), clears the Conversion FIFO, and resets all interrupt flags. The RESET bit will return to “0” after two clock cycles unless it is forced high by writing a “1” into the Configuration register’s Standby bit. A reset sig- nal is internally generated when power is first applied to the part. No operation should be started until the RESET bit is “0”. Writing a “1” to Bit 2 initiates an auto-zero offset voltage cali- bration. Unlike the eight-sample auto-zero calibration per- formed during the full calibration procedure, Bit 2 initiates a “short” auto-zero by sampling the offset once and creating a correction coefficient (full calibration averages eight samples of the converter offset voltage when creating a correction co- efficient). If the Sequencer is running when Bit 2 is set to “1”, an auto-zero starts immediately after the conclusion of the currently running instruction. Bit 2 is reset automatically to a “0” and an interrupt flag (Bit 3, in the Interrupt Status register) is set at the end of the auto-zero (76 clock cycles). After completion of an auto-zero calibration, the Sequencer fetches the next instruction as pointed to by the Instruction RAM’s pointer and resumes execution. If the Sequencer is stopped, an auto-zero is performed immediately at the time requested. Writing a “1” to Bit 3 initiates a complete calibration process that includes a “long” auto-zero offset voltage correction (this calibration averages eight samples of the comparator offset voltage when creating a correction coefficient) followed by an ADC linearity calibration. This complete calibration is started after the currently running instruction is completed if the Sequencer is running when Bit 3 is set to “1”. Bit 3 is re- set automatically to a “0” and an interrupt flag (Bit 4, in the In- terrupt Status register) will be generated at the end of the calibration procedure (4944 clock cycles). After completion of a full auto-zero and linearity calibration, the Sequencer fetches the next instruction as pointed to by the Instruction RAM’s pointer and resumes execution. If the Sequencer is stopped, a full calibration is performed immediately at the time requested. Bit 4 is the Standby bit. Writing a “1” to Bit 4 immediately places the LM12L458 in Standby mode. Normal operation returns when Bit 4 is reset to a “0”. The Standby command (“1”) disconnects the external clock from the internal circuitry, decreases the LM12L458’s internal analog circuitry power supply current, and preserves all internal RAM contents. Af- ter writing a “0” to the Standby bit, the LM12L458 returns to an operating state identical to that caused by exercising the RESET bit. A Standby completion interrupt is issued after a power-up completion delay that allows the analog circuitry to settle. The Sequencer should be restarted only after the Standby completion is issued. The Instruction RAM can still be accessed through read and write operations while the LM12L458 are in Standby Mode. Bit 5 is the Channel Address Mask. If Bit 5 is set to a “1”, Bits 13–15 in the conversion FIFO will be equal to the sign bit (Bit 12) of the conversion data. Resetting Bit 5 to a “0” causes conversion data Bits 13 through 15 to hold the instruction pointer value of the instruction to which the conversion data belongs. Bit 6 is used to select a “short” auto-zero correction for every conversion. The Sequencer automatically inserts an auto-zero before every conversion or “watchdog” compari- son if Bit 6 is set to “1”. No automatic correction will be per- formed if Bit 6 is reset to “0”. The LM12L458’s offset voltage, after calibration, has a typi- cal drift of 0.1 LSB over a temperature range of −40˚C to +85˚C. This small drift is less than the variability of the change in offset that can occur when using the auto-zero correction with each conversion. This variability is the result of using only one sample of the offset voltage to create a cor- rection value. This variability decreases when using the full calibration mode because eight samples of the offset voltage are taken, averaged, and used to create a correction value. Bit 7 is used to program the SYNC pin (29) to operate as ei- ther an input or an output. The SYNC pin becomes an output when Bit 7 is a “1” and an input when Bit 7 is a “0”. With SYNC programmed as an input, the rising edge of any logic signal applied to pin 29 will start a conversion or “watchdog” comparison. Programmed as an output, the logic level at pin www.national.com 22 |
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