DAC8574IPWR datasheet(3/1 Pages) TI

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DAC8574

SLAS377A – JANUARY 2003 – REVISED JUNE 2003

ELECTRICAL CHARACTERISTICS

DD = 2.7 V to 5.5 V, RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications -40°C to +105°C, unless otherwise specified.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

STATIC PERFORMANCE (1) (2)

Resolution

Bits

Relative accuracy

± 0.0987

% of FSR

Differential nonlinearity

Specified monotonic by design

± 1

LSB

Zero-scale error

Full-scale error

-0.15

±1.0

% of FSR

Gain error

± 1.0

% of FSR

Zero code error drift

±7

µV/

°C

Gain temperature coefficient

± 3

ppm of FSR/

°C

PSRR

VDD = 5 V

0.75

mV/V

OUTPUT CHARACTERISTICS (3)

Output voltage range

VREFH

Output voltage settling time (full scale)

RL = 2 kΩ; 0 pF < CL < 200 pF

µs

RL = 2 kΩ; CL = 500 pF

µs

Slew rate

V/µs

DC crosstalk

0.25

LSB

AC crosstalk

1 kHz Sine Wave

-100

-96

Capacitive load stability

RL= ∞

470

RL= 2 kΩ

1000

Digital-to-analog glitch impulse

1 LSB change around major carry

nV-s

Digital feedthrough

0.5

nV-s

DC output impedance

Ω

Short-circuit current

VDD= 5 V

VDD= 3 V

Power-up time

Coming out of power-down mode, VDD=

2.5

µs

+5 V

Coming out of power-down mode, VDD=

µs

+3 V

REFERENCE INPUT

VREFH Input range

VDD

VREFL Input range

VREFL < VREFH

GND

VDD

Reference input impedance

Ω

Reference current

VREF=VDD= +5 V

135

180

µA

VREF=VDD= +3 V

120

LOGIC INPUTS (3)

Input current

± 1

µA

VIN_L, Input low voltage

0.3xIOVDD

VIN_H, Input high voltage

VDD= 3 V

0.7xIOVDD

Pin Capacitance

POWER REQUIREMENTS

VDD, IOVDD

2.7

5.5

IDD(normal operation)

Excluding load current

IDD@ VDD=+3.6V to +5.5V

VIH= IOVDDand VIL=GND

950

1600

µA

(1)

Linearity tested using a reduced code range of 485 to 64714; output unloaded.

(2)

VREFH = VDD - 0.1 V, VREFL = GND

(3)

Specified by design and characterization, not production tested.

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