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STM32F427XX Datasheet(PDF) 95 Page - STMicroelectronics |
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STM32F427XX Datasheet(HTML) 95 Page - STMicroelectronics |
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95 / 239 page  DocID024030 Rev 9 95/238 STM32F427xx STM32F429xx Electrical characteristics 197 VIN Input voltage on RST and FT pins(7) 2V ≤VDD ≤3.6 V − 0.3 - 5.5 V VDD ≤2V − 0.3 - 5.2 Input voltage on TTa pins − 0.3 - VDDA+ 0.3 Input voltage on BOOT0 pin 0 - 9 PD Power dissipation at TA = 85 °C for suffix 6 or TA = 105 °C for suffix 7(8) LQFP100 - - 465 mW WLCSP143 - - 641 LQFP144 - - 500 UFBGA169 - - 385 LQFP176 - - 526 UFBGA176 - - 513 LQFP208 - - 1053 TFBGA216 - - 690 TA Ambient temperature for 6 suffix version Maximum power dissipation − 40 85 °C Low power dissipation(9) − 40 105 Ambient temperature for 7 suffix version Maximum power dissipation − 40 105 °C Low power dissipation(9) − 40 125 TJ Junction temperature range 6 suffix version − 40 105 °C 7 suffix version − 40 125 1. The over-drive mode is not supported at the voltage ranges from 1.7 to 2.1 V. 2. VDD/VDDA minimum value of 1.7 V is obtained with the use of an external power supply supervisor (refer to Section 3.17.2: Internal reset OFF). 3. When the ADC is used, refer to Table 74: ADC characteristics. 4. If VREF+ pin is present, it must respect the following condition: VDDA-VREF+ < 1.2 V. 5. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and VDDA can be tolerated during power-up and power-down operation. 6. The over-drive mode is not supported when the internal regulator is OFF. 7. To sustain a voltage higher than VDD+0.3, the internal Pull-up and Pull-Down resistors must be disabled 8. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax. 9. In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax. Table 17. General operating conditions (continued) Symbol Parameter Conditions(1) Min Typ Max Unit |
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