 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
STM32469VG Datasheet(PDF) 178 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32469VG Datasheet(HTML) 178 Page - STMicroelectronics |
|
|
178 / 217 page  Electrical characteristics STM32F469xx 178/217 DocID028196 Rev 3 NAND controller waveforms and timings Figures 67 through 70 represent synchronous waveforms, and Table 100 and Table 101 provide the corresponding timings. The results shown in this table are obtained with the following FMC configuration: • COM.FMC_SetupTime = 0x01; • COM.FMC_WaitSetupTime = 0x03; • COM.FMC_HoldSetupTime = 0x02; • COM.FMC_HiZSetupTime = 0x01; • ATT.FMC_SetupTime = 0x01; • ATT.FMC_WaitSetupTime = 0x03; • ATT.FMC_HoldSetupTime = 0x02; • ATT.FMC_HiZSetupTime = 0x01; • Bank = FMC_Bank_NAND; • MemoryDataWidth = FMC_MemoryDataWidth_16b; • ECC = FMC_ECC_Enable; • ECCPageSize = FMC_ECCPageSize_512Bytes; • TCLRSetupTime = 0; • TARSetupTime = 0; • Capacitive load CL = 30 pF. In all timing tables, the THCLK is the HCLK clock period. Figure 67. NAND controller waveforms for read access |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
