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C8051F54X Datasheet(PDF) 69 Page - Silicon Laboratories |
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C8051F54X Datasheet(HTML) 69 Page - Silicon Laboratories |
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69 / 276 page  C8051F54x 68 Rev. 1.1 SFR Address = 0x9E; SFR Page = 0x00 SFR Definition 8.4. CPT1MD: Comparator1 Mode Selection Bit 7 6 5 4 3 2 1 0 Name CP1RIE CP1FIE CP1MD[1:0] Type R R R/W R/W R R R/W Reset 0 0 0 0 0 0 1 0 Bit Name Function 7:6 Unused Read = 00b, Write = Don’t Care. 5 CP1RIE Comparator1 Rising-Edge Interrupt Enable. 0: Comparator1 Rising-edge interrupt disabled. 1: Comparator1 Rising-edge interrupt enabled. 4 CP1FIE Comparator1 Falling-Edge Interrupt Enable. 0: Comparator1 Falling-edge interrupt disabled. 1: Comparator1 Falling-edge interrupt enabled. 3:2 Unused Read = 00b, Write = don’t care. 1:0 CP1MD[1:0] Comparator1 Mode Select. These bits affect the response time and power consumption for Comparator1. 00: Mode 0 (Fastest Response Time, Highest Power Consumption) 01: Mode 1 10: Mode 2 11: Mode 3 (Slowest Response Time, Lowest Power Consumption) |
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