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C8051F54X Datasheet(PDF) 78 Page - Silicon Laboratories |
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C8051F54X Datasheet(HTML) 78 Page - Silicon Laboratories |
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78 / 276 page  C8051F54x 77 Rev. 1.1 Table 10.1. CIP-51 Instruction Set Summary Mnemonic Description Bytes Clock Cycles Arithmetic Operations ADD A, Rn Add register to A 1 1 ADD A, direct Add direct byte to A 2 2 ADD A, @Ri Add indirect RAM to A 1 2 ADD A, #data Add immediate to A 2 2 ADDC A, Rn Add register to A with carry 1 1 ADDC A, direct Add direct byte to A with carry 2 2 ADDC A, @Ri Add indirect RAM to A with carry 1 2 ADDC A, #data Add immediate to A with carry 2 2 SUBB A, Rn Subtract register from A with borrow 1 1 SUBB A, direct Subtract direct byte from A with borrow 2 2 SUBB A, @Ri Subtract indirect RAM from A with borrow 1 2 SUBB A, #data Subtract immediate from A with borrow 2 2 INC A Increment A 1 1 INC Rn Increment register 1 1 INC direct Increment direct byte 2 2 INC @Ri Increment indirect RAM 1 2 DEC A Decrement A 1 1 DEC Rn Decrement register 1 1 DEC direct Decrement direct byte 2 2 DEC @Ri Decrement indirect RAM 1 2 INC DPTR Increment Data Pointer 1 1 MUL AB Multiply A and B 1 4 DIV AB Divide A by B 1 8 DA A Decimal adjust A 1 1 Logical Operations ANL A, Rn AND Register to A 1 1 ANL A, direct AND direct byte to A 2 2 ANL A, @Ri AND indirect RAM to A 1 2 ANL A, #data AND immediate to A 2 2 ANL direct, A AND A to direct byte 2 2 ANL direct, #data AND immediate to direct byte 3 3 ORL A, Rn OR Register to A 1 1 ORL A, direct OR direct byte to A 2 2 ORL A, @Ri OR indirect RAM to A 1 2 ORL A, #data OR immediate to A 2 2 ORL direct, A OR A to direct byte 2 2 ORL direct, #data OR immediate to direct byte 3 3 XRL A, Rn Exclusive-OR Register to A 1 1 XRL A, direct Exclusive-OR direct byte to A 2 2 XRL A, @Ri Exclusive-OR indirect RAM to A 1 2 Note: Certain instructions take a variable number of clock cycles to execute depending on instruction alignment and the FLRT setting (SFR Definition 14.3). |
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