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C8051F54X Datasheet(PDF) 89 Page - Silicon Laboratories |
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C8051F54X Datasheet(HTML) 89 Page - Silicon Laboratories |
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89 / 276 page  C8051F54x 88 Rev. 1.1 the DPTR can be accessed through the SFR registers DPH, which contains the upper 8-bits of DPTR, and DPL, which contains the lower 8-bits of DPTR. 11.3.2. 8-Bit MOVX Example The 8-bit form of the MOVX instruction uses the contents of the EMI0CN SFR to determine the upper 8-bits of the effective address to be accessed and the contents of R0 or R1 to determine the lower 8-bits of the effective address to be accessed. The following series of instructions read the contents of the byte at address 0x1234 into the accumulator A. MOV EMI0CN, #12h ; load high byte of address into EMI0CN MOV R0, #34h ; load low byte of address into R0 (or R1) MOVX a, @R0 ; load contents of 0x1234 into accumulator A SFR Address = 0xAA; SFR Page = 0x00 SFR Definition 11.1. EMI0CN: External Memory Interface Control Bit 7 6 5 4 3 2 1 0 Name PGSEL[7:0] Type R/W Reset 0 0 0 0 0 0 0 0 Bit Name Function 7:0 PGSEL[7:0] XRAM Page Select Bits. The XRAM Page Select Bits provide the high byte of the 16-bit external data memory address when using an 8-bit MOVX command, effectively selecting a 256-byte page of RAM. 0x00: 0x0000 to 0x00FF 0x01: 0x0100 to 0x01FF ... 0xFE: 0xFE00 to 0xFEFF 0xFF: 0xFF00 to 0xFFFF |
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