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C8051F54X Datasheet(PDF) 27 Page - Silicon Laboratories |
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C8051F54X Datasheet(HTML) 27 Page - Silicon Laboratories |
27 / 276 page C8051F54x Rev. 1.1 27 4.3. QFN-24 Package Specifications Figure 4.5. QFN-24 Package Drawing Table 4.5. QFN-24 Package Dimensions Dimension Min Typ Max Dimension Min Typ Max A 0.70 0.75 0.80 L 0.30 0.40 0.50 A1 0.00 0.02 0.05 L1 0.00 0.15 b 0.18 0.25 0.30 aaa 0.15 D 4.00 BSC bbb 0.10 D2 2.55 2.70 2.80 ddd 0.05 e 0.50 BSC eee 0.08 E 4.00 BSC Z 0.24 E2 2.55 2.70 2.80 Y 0.18 Notes: 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing per ANSI Y14.5M-1994. 3. This drawing conforms to JEDEC Solid State Outline MO-220, variation WGGD, except for custom features D2, E2, Z, Y, and L which are toleranced per supplier designation. 4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components. |
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