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C8051F54X Datasheet(PDF) 33 Page - Silicon Laboratories |
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C8051F54X Datasheet(HTML) 33 Page - Silicon Laboratories |
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33 / 276 page  C8051F54x Rev. 1.1 33 been accumulated. Similarly, the Window Comparator will not compare the result to the greater-than and less-than registers until “repeat count” conversions have been accumulated. Note: When using Burst Mode, care must be taken to issue a convert start signal no faster than once every four SYSCLK periods. This includes external convert start signals. Figure 5.4. 12-Bit ADC Burst Mode Example With Repeat Count Set to 4 Track.. System Clock Convert Start (AD0BUSY or Timer Overflow) Post-Tracking AD0TM = 01 AD0EN = 0 Powered Down Powered Down T C Power-Up and Idle T C T C T C Power-Up and Idle T C.. Dual-Tracking AD0TM = 11 AD0EN = 0 Powered Down Powered Down T C Power-Up and Track T C T C T C Power-Up and Track T C.. AD0PWR Post-Tracking AD0TM = 01 AD0EN = 1 Idle Idle T C T C T C T C T C.. Dual-Tracking AD0TM = 11 AD0EN = 1 Track Track T C T C T C T C T C.. T C T C T C T C T = Tracking C = Converting Convert Start (CNVSTR) Post-Tracking AD0TM = 01 AD0EN = 0 Powered Down Powered Down T C Power-Up and Idle Power-Up and Idle T C.. Dual-Tracking AD0TM = 11 AD0EN = 0 Powered Down Powered Down T C Power-Up and Track Power-Up and Track T C.. AD0PWR Post-Tracking AD0TM = 01 AD0EN = 1 Idle Idle T C Dual-Tracking AD0TM = 11 AD0EN = 1 Track Track T C T C T C T = Tracking C = Converting Idle.. |
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